完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | 呂禮君 | en_US |
dc.contributor.author | Li-Jyun Lyu | en_US |
dc.contributor.author | 楊武 | en_US |
dc.contributor.author | Wuu Yang | en_US |
dc.date.accessioned | 2014-12-12T01:19:14Z | - |
dc.date.available | 2014-12-12T01:19:14Z | - |
dc.date.issued | 2007 | en_US |
dc.identifier.uri | http://140.113.39.130/cdrfb3/record/nctu/#GT009555576 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/39529 | - |
dc.description.abstract | 隨著近年來嵌入式系統的市場快速蓬勃,嵌入式系統處理器的執行速度以相當快的速度成長,在處理器的速度越來越快的情況下,機器執行程式的瓶頸,已經由原先處理器的執行速度漸漸轉移到的與處理器與週邊儲存設備溝通的速度,這主要來自於傳輸資料的速度與處理資料的速度落差所造成的處理器空轉的情況。為使程式效能有效提昇,減少記憶體存取次數,以提昇快取成功的機率,在效能提昇上成為一個可行且明確的方法。在嵌入式系統所使用的語言中,爪哇程式語言基於跨平台的特性在嵌入式平台上,一直佔著重要的地位,而跨平台所不得不付出的成本為效能上的低落,為解決此問題,將爪哇語言的byte code轉換成平台專屬的machine code,藉以提昇效能的爪哇即時編譯器,為針對嵌入式平台提昇爪哇程式語言執行效能的最佳解決方案。本篇論文修改爪哇即時編譯器,使爪哇即時編譯器所產生的machine code,能夠混合產生32bit-16bit指令,藉以有效減少程式碼的大小,以降低執行時指令快取失敗的機會,進而減少存取記憶體的次數,以取得效能上的提昇。此外,為了更有效的漸少程式碼,我們運行了一連串的實驗,針對VM處理器的特殊指定暫存器配置,及Register Set的設定調整。透過這些實驗,可以取得各種配置所能得到的程式碼減量情形,並探討減量所帶來的優化效應,如程式碼大小與程式執行效率之間的變化關西。實驗結果顯示,我們的方法平均可以減少百分之十左右的程式碼大小,同時幾乎沒有對效能造成負擔,當執行較大型的程式時,甚至能夠達到提昇效能的目的。 | zh_TW |
dc.description.abstract | In recent years, because the market of embedded systems develops quickly, the process speed of embedded systems had rapidly grown. As the processors become faster and faster, the bottleneck of program execution shifts to the communication between CPU and the main memory. The main reason is the increasing gap between CPU speed and memory speed. Reducing code size may potentially reduce the number of memory accesses (by increasing cache hit ratio) and becomes an effective method to improve CPU performance. For this reason, new CPU architectures provide both 16-bit and 32-bit instructions. We developed a new method that can generate a mixture of 16-bit and 32-bit instructions. This method is implemented and tested in a Java just-in-time compiler of a Java virtual machine for the Andes platform. Our experiment shows that the code size can be reduced 10% at very little extra overhead (only 0.13%). The performance improvement for a long-running program can be quite significant. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | 爪哇即時編譯器 | zh_TW |
dc.subject | 程式碼減量 | zh_TW |
dc.subject | 32bit-16bit混合固定長度指令集架構 | zh_TW |
dc.subject | JIT compiler | en_US |
dc.subject | reduce code size | en_US |
dc.subject | 32bit-16bit Mixed Instruction Set Architectures | en_US |
dc.title | 32bit-16bit混合指令集嵌入式系統程式碼減量爪哇即時編譯器 | zh_TW |
dc.title | Reducing Code Size in Java JIT Compilers for 32bit-16bit Mixed Instruction Set Architectures | en_US |
dc.type | Thesis | en_US |
dc.contributor.department | 資訊科學與工程研究所 | zh_TW |
顯示於類別: | 畢業論文 |