在異質雙核心平台上設計與分析動態分工的視訊解碼器

Abstract

在本篇論文中我們在異質雙核心平台上設計一個動態分工的視訊解碼器。一般傳統在處理異質雙核心的工作切割多半在系統開發時期根據profiling方式來切割工作，在這種方式之下系統在runtime的工作分工是固定且不會依照系統的狀況做改變。本篇論文我們提出了一個動態分工的架構，即工作切割是在runtime時期根據不同運算核心的loading狀況來決定。我們在TI OMAP5912平台上對MPEG-4 Simple Profile視訊解碼器分析利用動態分工下的系統效能。實驗結果顯示，基於提出的動態分工架構，在96MHz時脈下視訊解碼器對QVGA解析度(320×240)可達到超過40fps的視訊解碼速度。

This thesis presents the design of a video decoder to demonstrate the advantages of dynamic task partitioning for multimedia applications on heterogeneous embedded dual-core systems. Typical application processors for mobile devices are composed of a RISC core for control tasks and a DSP core for data stream processing. For such systems, a common design practice is to perform static task partitioning at design time. Task assignments to each core is fixed and do not change according to runtime system behavior. In this thesis, we proposed a dynamically partitioned approach where the task partitioning across heterogeneous cores is done at runtime. An MPEG-4 Simple Profile video decoder has been implemented using this approach on a TI OMAP 5912 platform for the analysis. Comparing to a decoder optimized for the DSP core, the performance gain is about 40% on average. We also demonstrated that the gain from dynamic task partitioning is even larger than the static partitioning approach when the cores are running other tasks. The experimental results show that dynamic task partitioning on heterogeneous dual-core systems can achieve more than 40 fps of QVGA video decoding at 96 MHz clock rate even when one of the cores is loaded with other tasks.