電流重複用之超寬頻金氧半低雜訊放大器應用於3.1-10.6GHZ

Abstract

本論文研製之一個電流重複使用低雜訊放大器，此低雜訊放大器具有高增益、低功率、低雜訊且小面積之優點。我們採用三級方式有別於一般電流重複使用低雜訊放大器，來擴充高頻的頻寬，使增益更為平坦，在第一級部分，我們是利用帶通慮波器來做input matching，接著第二級部分，利用疊接方式來達到電流重複使用，以降低功率消耗，最後我們採用一個LC並聯共振電路方式，來增強高頻部份的增益並增加頻寬作為第三級，在輸出部分則是利用current buffer的方式來達到output matching。供應電壓VDD為1.8伏特時，整個電路功率消耗約為10.3mW，及包含pad的情況下整個電路大小約為0.89 mm2。本研究的低雜訊放大器所量測的規格，平均順向增益(S21)在3.1~10.6GHz時為10dB，逆向隔離(S12)為-33dB以下，S11為-9dB以下，S22約為-11dB以下，而平均雜訊指數約為3.6dB。

A procedure is for an Ultra-Wideband CMOS LNA with Current-Reused Technique for 3.1 to 10.6GHZ. It has an advantage of high gain, low power consumption, low noise performance and small size. We utilize three-stage amplifier to get a flat gain at high frequency. The first stage introduces the band pass filter for input matching, the second stage introduces a current-reused cascaded common-sources structure to lower power consumption. The last stage introduces shunt-LC resonance to improve gain and the bandwidth. The current buffer configuration is used for output matching. The total power dissipation of the chip is about 10.3 mW at power supply 1.8 volt. The chip size included pad is 0.89 mm2. The measurement result of this study expect that the average forward S21 is 10dB at 3.1~10.6GHz, the reverse isolation S12 is under -33dB, the magnitude of S11 is under -9 dB, the magnitude of S22 is under -11dB, and the noise figure is 3.6dB.