低功率低電壓雙路管線式類比數位轉換器

Abstract

近來, 隨著高速與高整合電路應用; 先進製程演變, 趨於更低通道長度與更薄閘極氧化層厚度的 MOS 電晶體製作. 致使電晶體本質增益降低且工作電壓也隨之下降. 類比數位轉換器也對應須與數位處理系統整合在同一顆晶片上 (SOC). 一可操作於低電源電壓且耗電量極小之類比數位轉換器, 即成現今高整合之混合式訊號裝置中最主要探討點.

改良之管線式類比數位轉換器使用雙路架構, 利用兩路皆不甚精確電路產生所需精準度之訊號值. 憑藉大量降低電路所需精確度,以成低耗電與低電壓操作目的. 此外, 一新型放大器電路架構亦於本論文提出. 藉由前饋與電流比值方法,實現一個不需電容補償即可達高直流增益之放大器. 進而將此放大器應用於前述之雙路管線式類比數位轉換器電路中. 更甚者, 藉由雙路管線式類比數位轉換器之特殊結構, 可將此放大器設計在非尋常規格下, 由此達到一更加引人注目之低耗電值.

此電路系統使用90奈米CMOS製程技術設計. 電源電壓為 1V, 輸入訊號振幅達 1.4Vpp, 解析度11位元, 最高取樣頻率200MHz, 於Nyquist取樣頻率下, 最大耗電量5.3mW.

With recent application on higher speed and higher integration capability of circuits; The trend that the channel length of MOS transistor is smaller and the thinkness of gate oxide also becomes thinner. Therefore, the intrinsic gain of MOS transistor is lower and the operation voltage is also reduced. By the demand of integrate analog-to-digital converter with digital signal-processing system in the same chip (SOC), a low-power low-voltage analog-to-digital converter is an important key factor in mixed signal system nowadays. The improved Pipelined analog-to-digital converter adopts a Dual-Path structure. It utilizes two seperated analog-to-digital converter pathes with inaccurate specifications to generate a high accurate signal value. By a large reducing of the accuracy required in this novel strcture will achieve a low-power and low-voltage implement what we explore. Furthermore, a novel OpAmp circuit is also addressed in this thesis. By utilizing the methods of feedforward and current-ratio, it realizes an OpAmp of high DC gain without capacitor compensation. Then, we utilize this novel OpAmp in the Dual-Path Pipelined analog-todigital converter what we mentioned above. To make matters even more exciting, by the particular structure of Dual-Path Pipelined analog-to-digital converter, we can design this OpAmp under unusual specifications to attain to an attractive lower power value. This complete circuit is designed with a 90nm CMOS technology. Power supply voltage is 1 V, input signal amplitude is 1.4 Vpp, resolution is 11-bit, the maximum sampling frequency is 200MHz. At Nyquist rate, the maximum power consumption is 5.3mW.