應用於直流至直流切換式電源供應器積體電路設計之先進控制及保護技術

Abstract

在本論文中，我們探討了應用於直流至直流電源轉換的切換式電源供應器。首先簡單介紹了非隔離式直流至直流切換式電源供應器的基本架構，並且探討了電源供應器運作上的安全問題，也簡單介紹了電源供應器的設計規格。基於這些有關直流至直流切換式電源供應器的基本知識，我們開發了數種電路技術。這些電路技術提高了能量轉換效率、縮小電源供應器體積並且可以操作在相當廣的範圍。此外，這些電路技術也提供了快速瞬變反應以及安全的操作。我們將這些新開發的技術以一個單晶片電流模式控制的降壓轉換器來實現。這些電路技術可以被應用到其它架構如昇壓或昇降兩用型的切換式電源供應器設計，特別是應用於積體電路電源轉換器設計上。 我們提出了一個可整合於單晶片上的柔性啟動電路，它並不需要額外的針腳並且只佔了很小的晶片面積。這個電路以串聯金氧半電晶體及一個內建於晶片上的小電容來達到數毫秒到數十毫秒的柔性起動時間。此柔性啟動電路可以防止電源供應器啟動時的突波電流，並且在縮小電源供應器體積的同時仍保障了安全性。此電路的另一好處是它非常簡單，因此可以很容易應用於其它的電源供應積體電路設計。 另外，我們也提出了動態部分停工策略，這個策略充分利用了切換式電源供應器的特性。它降低了對輸入電流的浪費，同時卻仍保持電路的性能。此動態部分停工策略提昇了轉換效率，特別是在輕載的時候。因此由電池供電的設備其待機時間可因應用此策略而拉長。根據我們的實驗，當此策略與突波頻率調變共同使用時，其轉換效率可由62 % ~ 75 %提昇至84 % ~ 89 %。 在我們的設計中，我們採用了一種基於電流傳送器的近無功耗電流感測技術來實現我們的電流模式控制。我們也充分利用了這個電流感測技術的特性而開發了新的斜率補償電路和過電流保護電路。我們所提出的斜率補償電路較傳統電路而言大幅降低了電路的複雜度，因此節省了晶片面積。在此同時，也因為減少了訊號轉換的次數而降低了訊號的失真。至於過電流保護電路也較傳統電路大為簡化。此過電流保護電路的特長為面積小、功耗低及反應速度快，因此可確保電源供應器的安全性。此外，所提出的斜率補償電路和過電流保護電路都很容易因應不同的需求來加以設計並調整，因此對切換式電源供應器而言，我們可以得到很好的電壓調節並且能適用於廣泛的操作範圍。對於不同的切換式電源供應器架構也能適用。 這些技術加上一些基本的保護電路都整合於一個示範性晶片上。根據量測結果，我們可以得知這些技術確實發揮了它們的功效。在此我們提出了一個最高可達96.7 %轉換效率的單晶片直流至直流電流式控制降壓轉換器。我們提出了以較低功耗達到快速電路反應的動態部分停工策略以增進轉換效率。突波寬度調變和突波頻率調變的自動切換並配合動態部分停工策略更進一步提昇了輕載時的轉換效率。電流偵測電路和斜率補償電路則簡化了電流式控制電路並加快了反應速度。一個高速過電流保護電路也根據此電流偵測電路而發展出來。新的整合式柔性啟動電路不需額外元件就能有效地防止啟動時的突波電流。我們設計的直流至直流轉換器已採0.6微米的互補式金氧半製程製作出來，晶片面積為1.35毫米平方，而控制器部分佔0.27毫米平方。實驗結果顯示此新式柔性啟動電路具有1.5毫秒以上的柔性啟動時間，因此有效地抑制了啟動時的突波電流。此轉換器可在2.2至6伏特的輸入電壓下操作，切換頻率為1.1百萬赫。在輸出電流為0.9至800毫安培時具有88.5 ~ 96.7 %的轉換效率，而在輸出電流為1000毫安培時仍有85.5 %的轉換效率。

In this dissertation, we discuss about the switched mode power supply (SMPS) for DC-DC power conversion. Basic topologies of non-isolated DC-DC SMPS are introduced. Safety considerations for power supply design are discussed. The design specifications are also included. Based on the knowledge of DC-DC SMPS, we developed several new circuit techniques to achieve high conversion efficiency, compact converter size, wide operating range, fast transient response and safety operation. These developed circuit techniques were realized in a monolithic current-mode buck converter. The application of these circuit techniques can be extended to other topologies like boost and buck-boost of SMPS design, especially in integrated circuit power converter design. The on-chip soft-start circuit occupies a small silicon area and eliminates the need of extra pin-out. This circuit achieves one to tens of milliseconds soft-start time using series MOS transistors and a small on-chip capacitor. This circuit prevents the inrush current during the start-up of the power module. It provides safety operation and shrinks the converter size in the same time. Another benefit of the proposed circuit technique is that because of its simplicity, it can be easily adopted for any other power supply IC design. The dynamic partial shutdown strategy (DPSS) is a power management strategy. By exploiting the switching characteristics of SMPS, we developed this strategy. This strategy eliminates the unwanted waste of operating current and keeps the circuit performance at the same time. The DPSS improves the conversion efficiency especially in light load operation. Thus the standby time of battery operated devices can last longer by utilizing DPSS. Combined with the pulse frequency modulation (PFM) mode, the conversion efficiencies are improved from 62 % ~ 75 % to 84 % ~ 89 % measured in our test chip. In our design, we choose a quasi-lossless current conveyor based current sensing technique to implement our current-mode control. By exploiting the characteristics of this current sensing technique, we developed the slope compensation circuit and the over-current protection circuit. The proposed slope compensation circuit has reduced circuit complexity than traditional ones thus the silicon area is saved. The signal distortion is also reduced because we eliminate the multi-conversions of signals. The over-current protection is also simpler than traditional ones. The benefits of the over-current protection circuit are reduced silicon area, reduced power consumption and faster response for safety operation. Additionally, these circuits can be easily designed and adjusted. So we can achieve good regulation and wide operating range. These circuit techniques can also be applied to other topologies for different applications. Incorporating with other basic protection schemes, the above techniques are integrated into a demo chip. From the measurement results, we can see the effectiveness of these developed techniques. A monolithic current-mode pulse width modulation (PWM) step-down DC-DC converter with 96.7% peak efficiency is presented. The high efficiency is achieved by DPSS which enhances circuit speed with less power consumption. Automatic PWM and PFM switching boosts conversion efficiency during light load operation. The modified current sensing circuit and slope compensation circuit simplify the current-mode control circuit and enhance the response speed. A simple high-speed over-current protection circuit is proposed with the modified current sensing circuit. The new on-chip soft-start circuit prevents the power on inrush current without additional off-chip components. The DC-DC converter has been fabricated with a 0.6 贡m CMOS process and measured 1.35 mm2 with the controller measured 0.27 mm2. Experimental results show that the novel on-chip soft-start circuit with longer than 1.5 ms soft-start time suppresses the power-on inrush current. This converter can operate at 1.1 MHz with supply voltage from 2.2 V to 6.0 V. Measured power efficiency is 88.5 ~ 96.7% for 0.9 mA to 800 mA output current and over 85.5% for 1000 mA output current.