標題: 原子層沉積高介電係數氧化鋁閘極介電層之三五族元件電物性研究
Electrical and physical characteristics of III-V devices with atomic-layer-deposited Al2O3 high-κ gate dielectric
作者: 江欣哲
Hsin-Che Chiang
簡昭欣
Chao-Hsin Chien
電子研究所
關鍵字: 三五族場效應電晶體;砷化鎵;原子層沉積;砷化鎵電容;III-V MOSFET;GaAs;Atomic-layer-deposited;GaAs MOSCAP
公開日期: 2008
摘要: 在這篇文獻中,我們已經最佳化利用硫鈍化處理的方式處理砷化鎵表面,並且成功地使Dit值下降到5E12cm-2eV-1。一開始的時候,我們利用XPS方式去分析Ga2p3和As2p3在不同的硫鈍化處理下成份變化情形,我們發現到當我們把硫化濃度和溫度提高時,砷化鎵表面的氧化物會被有效的抑制;同時,我們也觀察到利用硫化氨配合丁醇的方式對於表面氧化物抑制確實比傳統硫化氨配合水來的有效。在另一方面,我們也同時去研究反應頻率的表現在其他三五族砷化銦和砷化銻。對於較小能矽材料來說,相對的它的反應頻率也就越快。對於這篇研究說,利用不同硫化處理的方式在這兩種材料似乎對於氧化物和基板介面並沒有太大改善。針對電容研究的情形,我們最後使用硫化氨加丁醇方式去製作出砷化鎵場效應電晶體來。   此外,我們也使用不同合金材料去做一些歐姆接觸方面的研究,基本上我們是以金-鍺為基底分別鍍上鎳、鍺、金材料,接著利用快速退火的方式達到較低的毆姆接觸。我們發現,當溫度越高時,表面的粗操度也就越大,對於阻值會有一定的影響。   最後,我們综合前面的結果在半絕緣的基版上面製作金半場效應電晶體和金氧半場效應電晶體。我們已經成功低將電子遷移率提升到460cm2V-1S-1,相對來說還是比較低的值,可能是因為表面蝕刻後粗操度和高濃度摻雜後庫倫散射所造成。因此,我們可以推論出硫化氨加丁醇鈍化方式在表面形成保護層,以及利用氧化物退火的方式去完成較好品質的場效應電晶體。再之後我們利用超高真空化學氣相沉積的方式去沉積矽鍺緩衝層,利用這種方式使三五族長在矽的基板上去降低材料成本,我們認為這將是未來應用上重要結構,並且對於後矽時代高遷移率元件量產上有所幫助。
In this thesis, we had optimized the sulfide treatment on GaAs surface and also eliminate the surface state to 5E12 (cm-2eV-1) successfully. In the beginning, we analyzed the component of Ga 2p3 and As 2p3 photoemission spectra with different sulfide passivation. We found the oxide decrease due to increasing sulfur concentration and process temperature; and we found this solution did result in superior electrical characteristics than the conventional (NH4)2S solution (H2O). On the other hand, we also fabricated the Pt/ALD-Al2O3/InSb InAs capacitors to discuss the minority response. The smaller band gap resulted in high transition frequency. Interface density of InSb and InAs were not changeable with any surface treatment in this study. We choose the better condition: (NH4)2S+C4H9OH at 60 C to fabricate GaAs nMOSFET. In addition, we also tried different alloy metal material to form S/D ohmic contact. The most common approach to the formation of AuGe-based ohmic contacts is to evaporate layers of Ni, Ge, and Au metals onto the GaAs sample followed by annealing. Obviously, the higher the temperature used, the rougher the top surface and metal-substrate interface was observed. Finally, we had fabricated MESFET and MOSFET on semi-insulator substrate. The electronic mobility we extracted is 460 cm2V-1S-1; the lower mobility was due to rough surface and Column scattering. Therefore, we conclude that the high quality MOSFET can be achieved integrating (NH4)2S+C4H9OH and dielectric annealing process. Finally, we grew heavy-doped channel on Si substrate, which can be considered as the potential structure of novel device for metal-oxide-semiconductor field effect transistor application.
URI: http://140.113.39.130/cdrfb3/record/nctu/#GT079511584
http://hdl.handle.net/11536/41041
Appears in Collections:Thesis


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