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dc.contributor.author涂德松en_US
dc.contributor.authorTe-Sung, Tuen_US
dc.contributor.author李崇仁en_US
dc.contributor.author蘇朝琴en_US
dc.contributor.authorChung-Len, Leeen_US
dc.contributor.authorChau-Chin, Suen_US
dc.date.accessioned2014-12-12T01:24:35Z-
dc.date.available2014-12-12T01:24:35Z-
dc.date.issued2003en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#GT009067511en_US
dc.identifier.urihttp://hdl.handle.net/11536/41046-
dc.description.abstract本篇論文主要是提出一個相容於IEEE Std. 1149.4 類比自我測試方法。On-chip產 生三角波測試訊號源,此波形經由類比匯流排傳送到類比CUT (Chip Under Test),其響應波形再經由另一條匯流排傳送到比較器,與比較器的輸入參考電壓相比與量化,輸出結果以統計方法分析來增加量化的解析度與減少雜訊的干擾。實體電路的測試結果証明此測試方法的可行性。zh_TW
dc.description.abstractA dynamic analog BIST methodology is proposed based on IEEE std. 1149.4 DFT infrastructure in this thesis. The on-chip generated triangular stimulus is sent to the analog CUT through the analog test buses and the response is quantized by the dual comparators. Statistical analysis is conducted to enhance the quantization resolution and minimize the noise effect. The experimental results by hardware emulation confirm the feasibility of the proposed methodology.en_US
dc.language.isozh_TWen_US
dc.subject類比測試zh_TW
dc.subjectAnalog BIST Testingen_US
dc.title相容於IEEE Std. 1149.4 類比自我測試方法zh_TW
dc.titleIEEE Std. 1149.4 Compatible Analog BIST Methodologyen_US
dc.typeThesisen_US
dc.contributor.department電機學院電子與光電學程zh_TW
Appears in Collections:Thesis


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