無排列缺陷之半V型鐵電式液晶元件及其應用

Abstract

表面穩定鐵電式液晶(surface-stabilized FLC)元件是目前廣為研究的鐵電式液晶元件技術，除了反應時間快，因為平面的分子運動，其視角也較傳統液晶顯示器大，然而表面穩定鐵電型液晶元件的應用在過去的研究中有兩個主要的問題，缺乏連續的灰階以及難有良好的液晶排列，此缺點嚴重影響到液晶元件的對比度。除了雙穩態之表面穩定鐵電型液晶模式，半V型鐵電式液晶(half-V switching mode FLC)模式是以改變光軸方向而達到連續灰階。然而半V型鐵電式液晶元件於液晶排列上仍有缺陷存在，在降溫的過程中，半V型鐵電式液晶元件由N*液晶相轉變成SmC*液晶相時，液晶分子雖然順著配向處理的方向排列，卻因層列層(smectic layer)排列方向之不同，使得液晶分子有兩個極性方向之排列，因而產生兩種排列區塊，名為水平山形袖章缺陷(horizontal chevron defect)。半V型鐵電式液晶元件於結構上不易排列及衍生出的缺陷是目前我們極欲解決的問題。

此論文以液晶能量的角度探討半V型鐵電式液晶元件之水平山形袖章缺陷形成的原因，並研究利用表面處理消除排列缺陷。對於有水平山形袖章缺陷的鐵電式液晶而言，其排列可以分為自發性極化(spontaneous polarization, PS)指向上的PSup 區塊(domain)及指向下的PSdown區塊。當上下基板於相同的配向處理下， PSup區塊及PSdown區塊擁有相同的總自由能。換言之，此兩種區塊皆會出現於元件中。如果能設法使兩種區塊的能量產生大小的差異，則液晶分子會傾向排列於能量較低的狀態進而得到單一種排列。依液晶能量公式，控制配向層之極性表面能量可讓兩種區塊產生能量差異。於此，有兩種可能的配向組合: 1. 結合強與弱配向方法：結合研磨配向(rubbing alignment)與電漿配向(plasma alignment)。2. 控制配向層之表面極性，上下基板分別使用極性相反的配向層材料。使用非對稱配向技術，在液晶盒厚度小於1.8μm且配向層表面平坦的液晶盒中成功地去除了水平山形袖章缺陷。

鐵電式液晶因快速反應的特性，可於光電元件的應用上，達到光電訊號傳輸上的快速響應。延續使用無排列缺陷的半V型鐵電式液晶元件製程技術，我們以條狀電極方式製作鐵電型液晶光柵，在有條狀突起電極不平整的基板上研究去除鐵電式液晶之排列缺陷並設計電極寬度提高繞射效率。

藉由降低液晶盒厚度，延展鐵電式液晶之螺距及使用非對稱配向可得良好排列的鐵電式液晶元件。然而在面板製程中，其液晶盒間距大於3 µm已經比表面穩定鐵電式液晶之間距大了兩倍。我們進一步研究鐵電式液晶於3.5 µm液晶盒中的排列，延展鐵電式液晶之螺距至10 µm以上並使用非對稱配向降低排列缺陷。

Many studies have confirmed that the fast response of surface-stabilized ferroelectric liquid crystal (SSFLC) is suitable for fast switching devices. However, the lack of a continuous gray scale limits the potential for display application. Half-V switching FLC mode (HV-FLC) with its intrinsic continuous gray scales is more suitable for the driving of active matrix thin-film-transistors (AM TFT). The major drawback in HV-FLC devices is the horizontal chevron alignment defect. This is due to the presence of both spontaneous polarization (PS) up and down domains when the HV-FLC device cools down from its N*-SmC* phase transition. Resolution of the alignment defect remains a challenge to overcome before the potential for display application of HV-FLC can be realized.

In this dissertation, the origin of the horizontal chevron alignment defect is explained by considering the physical aspect of the FLC’s free energy. The PS up and PS down domains co-exist because of the same minimum total free energy in the symmetrical cell in which the top and the bottom alignment surfaces have the same polar surface interaction coefficients. As a result, a defect-free alignment texture is only achievable when the orientation of the FLC’s PS direction is the same. According to HV FLC’s total free energy, a large difference in the polar surface energy term under asymmetrical alignment conditions may hold the key to lowering the FLC’s free-energy level. Two approaches to solve the alignment problem caused by surface pre-treatment were identified. Firstly, by applying rubbing and plasma alignment techniques on both top and bottom substrates, the alignment strength which differentiates values were controlled. Secondly, by using alignment layers with opposite sign of surface polarities, the sign of was changed. The asymmetrical alignment techniques were applied to control the anchoring energy and surface polarity and to validate theoretical predictions.

Using the asymmetric alignment technique, based on double-side striped electrodes, the electrically tunable FLC grating, approaching calculated diffraction efficiency is demonstrated. FLC’s alignment in the ITO patterned non-uniform surface is studied. The width of thin striped electrodes is designed smaller than half of the grating pitch to compensate for the fringe field effect and thus improve the diffraction efficiency.

Good FLC alignment is able to be achieved by small cell gap, certain pitch design, and surface polarity control asymmetric cell. The remaining unsolved issue in display applications is the cell process limitation in manufacture. The cell gap of most TFT-LCDs is controlled larger than 3 µm. The minimum cell gap requirement is, at least, 2 times greater than SSFLC cell. We studied a potential approach which can be applied to minimize the alignment defects in the cell gap 3.5 µm.