氮化矽快閃記憶體的暫態行為及其應用

Abstract

為了了解以及改善快閃記憶體所有暫態操作行為模式，建立一個可以包含寫入、讀出，以及抹除的行為魔性是需要的。藉由所建立出的模型，可以最佳化氮化矽快閃記憶體的儲存能力。在之前的研究裡面，有關寫入以及讀出的模型已被成功的建立以及驗證。此論文中，將重點先放在有關抹除的暫態行為模型建立以及驗證。藉由建立出來的模型，不但可用來成功的模擬n型閘極以及p型閘極的SONOS 結構快閃記憶體暫態行為，也可以用在TANOS(鉭化矽閘極+氧化鋁介電層)結構的快閃記憶體。將所有建立的暫態行為模型結合，可以同時用來最佳化SONOS以及TANOS的製程條件。由實驗結果發現，對於SONOS快閃記憶體來說很難同時達到三種行為的要求，但對於TANOS來說，可以得到一最佳化的厚度範圍來滿足所有操作模式的需求。此外，由建立的模型可以發現喘痛用外插方式粹取讀取條件的方式是會低估其可以容許的讀取偏壓。最後，由模型可以預期帶未來走向圓形結構的快閃記憶體是最有淺力取代現有的平面結構快閃記憶體選擇，其在不但免疫雜訊更可以有較大的儲存空間。

For the overall transient behavior consideration, it is necessary to establish the model for program, read disturb, and erase. With the assist of model, the issue for the limited window of nitride based memory could be optimized. In the previous study, program and read disturb characteristics is well built. Here, we focus on the erase behavior at the first place. The erase characteristics of a SONOS-based structure are emulated not only for n+-poly and p+-poly gates but also for TaN-gate+Al2O3 combination. By incorporating all our work, performances including program, erase, and read disturb can be reviewed for both SONOS and TANOS devices. Unsurprisingly, it is hard to satisfy all requirements by using a SONOS device. In a TANOS device, an optimal bottom oxide thickness can be specified with the consideration of the three factors simultaneously. Moreover, it is found that conventional extrapolation methodology is inadequate to predict the lifetime of a TANOS device and tends to under-estimate the tolerable read bias. Eventually, the cylindrical cell with the geometrical benefit could be an prominent candidate to for the future Flash structure. In our study, the cylindrical cell is not only immune to noise but also has improved window.