標題: 模組化在單迴路積分三角類比數位轉換器中積分器充放電雜訊與諧波失真模型
Modeling Settling Noises and Distortions for Single-Loop Sigma-Delta Modulators
作者: 謝武璋
Hsieh, Wu-Chang
陳福川
Chen, Fu-Chuang
電控工程研究所
關鍵字: 積分三角轉換器;積分充放電雜訊;積分充放電失真;Sigma-delta modulator;Settling noise;Settling distortion
公開日期: 2009
摘要: 交換式電容積分器已經被廣泛的應用在積分三角轉換器的領域中,且由於積分器中電容不完全的充放電轉換特性(積分器充放電問題),使得此積分器充放電問題與其效能有著高度的相關性。因此,在現今已發表出之積分三角轉換器中,積分器充放電問題是一個很艱難且棘手的設計課題。而因為積分器充放電問題的高複雜性,相關的誤差和失真的解析模型實際上是不存在的。此篇論文的目地在於利用了非線性擬合方法和輸出端頻譜預測技術來探討單迴路積分三角轉換器的積分器充放電問題。經由上面的分析,我們可以獲得積分器充放電問題誤差和失真的封閉解,且此封閉解可以經由積分三角轉換器中的系統參數所組成的函式呈獻出來。我們同時利用了行為層的模擬以及電晶體層次的電路模擬來驗證此解析模型的正確與精確性。由上面的驗證結果顯示出此兩種模擬結果與我們的解析模型有著相當合適的一致性。
Switch-capacitor (SC) integrators have been widely used in sigma-delta modulators ( Ms) and the performances of SC integrators depend highly on their incomplete charge-transfer (settling problem) behavior. Therefore, the settling problem is a crucial design concern in well-published switch-capacitor Ms. Due to the complexity of settling problem, analytic models for related noises and distortions are virtually non-existent. The aim of this paper attempts to explore the settling problems on single-loop Ms by employing nonlinear fitting methods and output spectrum prediction techniques. Closed forms of settling error and settling distortion models are acquired, and are represented as functions of modulator system parameters. Both behavior simulations and transistor-level-circuit simulations are employed to verify these analytical models. The results of above validation showed an appropriate level of consistence between the two simulations and our analytical models.
URI: http://140.113.39.130/cdrfb3/record/nctu/#GT079612616
http://hdl.handle.net/11536/41934
顯示於類別:畢業論文


文件中的檔案:

  1. 261601.pdf

若為 zip 檔案,請下載檔案解壓縮後,用瀏覽器開啟資料夾中的 index.html 瀏覽全文。