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dc.contributor.authorTsai, JWen_US
dc.contributor.authorCheng, HCen_US
dc.contributor.authorChou, Aen_US
dc.contributor.authorSu, FCen_US
dc.contributor.authorLuo, FCen_US
dc.contributor.authorTuan, HCen_US
dc.date.accessioned2014-12-08T15:01:36Z-
dc.date.available2014-12-08T15:01:36Z-
dc.date.issued1997-08-01en_US
dc.identifier.issn0013-4651en_US
dc.identifier.urihttp://hdl.handle.net/11536/424-
dc.description.abstractThe amorphous silicon thin film transistors (a-Si:H TFTs) with dual intrinsic layers, namely, a bottom a-Si:H deposited at a low deposition rate and an upper layer at a high deposition rate, were investigated to improve the manufacturing throughput. It was found that the high deposition rate for the upper layer resulted in high density of states and low mobility and high threshold voltage. Although a-Si:H TFTs with high deposition rates for the upper layer still had an I-on/I-off ratios higher than 10(6) and saturation mobility higher than 0.4 cm(2)/V s, the deposition rates of 1786 and 3340 Angstrom/min exhibited a significant current crowding and led to low mobility and on-current in the linear region. On the other hand, a-Si:H TFTs with deposition rate of 1170 Angstrom/min for the upper layer achieved similar characteristics as those with single layer deposited at deposition rate of 482 Angstrom/min. Furthermore, the stress stability for deposition rate of 1170 Angstrom/min also showed a threshold voltage shift similar to that of a single-layer one. This indicated that the deposition rate of the upper layer for dual-layer a-Si:H TFTs must be properly chosen for applications in high resolution LCDs.en_US
dc.language.isoen_USen_US
dc.titleThe electrical characteristics of the amorphous silicon thin film transistors with dual intrinsic layersen_US
dc.typeArticleen_US
dc.identifier.journalJOURNAL OF THE ELECTROCHEMICAL SOCIETYen_US
dc.citation.volume144en_US
dc.citation.issue8en_US
dc.citation.spage2929en_US
dc.citation.epage2932en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:A1997XT45300064-
dc.citation.woscount1-
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