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dc.contributor.author許惠錚en_US
dc.contributor.authorHui-Cheng Hsuen_US
dc.contributor.author張添烜en_US
dc.contributor.authorTian-Sheuan Changen_US
dc.date.accessioned2014-12-12T01:34:24Z-
dc.date.available2014-12-12T01:34:24Z-
dc.date.issued2003en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#GT009111582en_US
dc.identifier.urihttp://hdl.handle.net/11536/43469-
dc.description.abstractMPEG-4視訊編解碼系統支援以物件為基礎(object-based)的編解碼方式,相較於傳統以畫面為基礎(frame-based)的MPEG-1/2視訊編解碼系統,需處理較不規則的資料,因此編解碼的複雜度也相對提高。此外,MPEG-4可應用於可攜式電子產品,對於能量消耗與成本控制都有一定的要求。 基於上述需求,我們設計了具高能量使用效率的MPEG-4材質解碼器。設計上,在符合規格的前提下,藉由提高輸出率,降低時脈頻率以減少能量消耗。首先我們利用離散餘弦轉換係數大量為零的特性,提出零係數跳躍機制(zero-skipping scheme) 搭配零索引表(zero index table)與方塊類型表(block type table),不僅在反量化(IQ),形狀適應反離散餘弦轉換(SA-IDCT) 可省去計算輸入為零的時脈週期數,在反DC/AC預測(Inverse DC/AC Prediction),反掃描(IS),形狀適應反離散餘弦轉換的記憶體存取次數亦可減少。此外,分割DCAC記憶體與可變長度編碼表(VLC table),可避免對不需要的記憶體和電路做存取和運算。我們所提出的可變長度解碼器(VLD)架構,不但維持每個時脈週期一個結果(EVENT)的輸出率亦可有效降低能量消耗。至於降低成本方面,在形狀適應反離散餘弦轉換模組中,利用離散餘弦轉換矩陣對稱的特性及適當的排程,共用乘法器。提出結合移動、對齊與轉置的自動對齊轉置記憶體。並透過最佳化排程及調整解碼流程,共用硬體資源。 根據效能評估的結果,以UMC 0.18μm 1P6M CMOS製程實現,支援CIF@30fps即時解碼,時脈頻率僅需2.14MHz,而對應的功率消耗為0.957 mW。相較於目前已公開之同功能解碼器,我們的材質解碼器具有較佳的能量使用效率。zh_TW
dc.description.abstractMPEG-4 video system supports object-based coding. This object-based video coding increases the computational complexity due to the irregular data nature from the object. Besides, since MPEG-4 is widely adopted in the portable devices, low power and high energy efficiency is another critical issue to solve. This thesis presents an MPEG-4 texture decoder to address these two major issues. To solve them, we exploit the characteristics of high percentage of zero in the DCT coefficients. We propose the zero-skipping scheme with zero index tables and block type table together to reduce redundant computation cycles on IQ and SA-IDCT and memory access on DCAC buffer, IS buffer and transpose memory in SA-IDCT. Hence, the overall throughput and power consumption in texture decoder are improved significantly. Moreover, DCAC bank partition and VLC table partition are also adopted to save the power of accessing large memory and unnecessary logics without scarifying throughput. Besides, to reduce the complexity and hardware cost, we also explore the symmetry features of DCT matrix to share multipliers and propose an auto-aligned transpose memory to merge the operation of shifting, alignment and transposing in SA-IDCT. In addition, resource sharing is enabled via reordering the decoding flow and careful scheduling. The synthesized design can perform texture decoding of CIF@30FPS under 2.14 MHz. using UMC 0.18μm 1P6M technology, the reported power consumption is 0.957 mW. Our texture decoder is more energy efficient comparing with other existing designs.en_US
dc.language.isoen_USen_US
dc.subjectMPEG-4材質解碼器zh_TW
dc.subject形狀適應反離散餘弦轉換zh_TW
dc.subject可變長度解碼器zh_TW
dc.subject反DC/AC預測zh_TW
dc.subject零係數跳躍機制zh_TW
dc.subject零索引表zh_TW
dc.subject方塊類型表zh_TW
dc.subjectMPEG-4 texture decoderen_US
dc.subjectSA-IDCTen_US
dc.subjectVLDen_US
dc.subjectInverse DC/AC Predictionen_US
dc.subjectzero-skipping schemeen_US
dc.subjectzero index tableen_US
dc.subjectblock type tableen_US
dc.titleMPEG-4 材質解碼器設計zh_TW
dc.titleOn the Design of MPEG-4 Texture Decoderen_US
dc.typeThesisen_US
dc.contributor.department電子研究所zh_TW
Appears in Collections:Thesis