標題: | Architecture design of MPEG-4 texture decoder - Supporting object-based video coding |
作者: | Hsu, HC Chang, NYC Chang, TS 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
公開日期: | 2005 |
摘要: | Handling of the complexity which arises due the irregularity data nature for MPEG-4 object based video coding is an important issue in MPEG-4 texture decoder design. Another crucial issue is designing an efficient architecture to satisfy the resource sensitive nature of portable embedded video codec systems. This paper presents an architecture for texture decoding to address these two major issues. By adopting zero-skipping and zero index tables together, the throughput and power consumption are improved significantly. To avoid incurring extra hardware overhead, multiplication sharing and buffer sharing are also incorporated. ne synthesized design can perform texture decoding of CIF@30FPS under 2.18 MHz. using UMC 0.181 mu m 1P6M technology, the reported power consumption is 0.92 mW. |
URI: | http://hdl.handle.net/11536/18046 |
ISBN: | 0-7803-9060-1 |
期刊: | 2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation & Test (VLSI-TSA-DAT), Proceedings of Technical Papers |
起始頁: | 275 |
結束頁: | 278 |
顯示於類別: | 會議論文 |