標題: | TFT LCD金屬層變更之研究 A Study of metal layer change of TFT LCD |
作者: | 林福祿 Lin, Fu-Lu 李安謙 Lee, An-Chen 工學院精密與自動化工程學程 |
關鍵字: | TFT;LCD;Array;金屬變更;物理氣相沈積;濕蝕刻機;TFT;LCD;Array;metal change;PVD;Wet etche |
公開日期: | 2010 |
摘要: | 本研究主要在探討TFT LCD Array 5道製程中,針對第1道Gate金屬層的AlNd材質變更為AlNiLa之為影響。實驗材料選用無鹼的基板(尺寸:730×920 mm;由康寧提供),經由原來的Array 5道製程,只在第1道中變更生產參數,再使用實驗設計法,尋找出最佳的條件,並以Array的良率及電性結果當做最終判定,均需符合目前水準,才可判定此金屬層的導入是成功地。
由本實驗結果顯示,使用實驗設計法可將PVD與ETCH製程之最佳條件引出,再利用假設檢定的t檢定(2 sample t)及ANOVA檢定法(two-way ANOVA),來判斷導入後的AlNiLa在良率及電性上是有明顯的比導入前佳,故此導入是成功地,而且具有統計學的基礎,所以在風險上是可以有效的控制地,並且可替公司省下2千1百多萬元的年度支出成本費用。
最後在PVD與ETCH製程上,可各獲得到一組最佳配方(PVD:成膜溫度 120℃、成膜 power 35kw、成膜氣體_Ar 150 sccm;ETCH:光阻烘烤時間10 sec、過蝕刻率 0%、蝕刻溫度 40℃),使AlNiLa在Gate金屬層的導入可達到產品品質最佳化的結果。 This study discussion the array five masks on the TFT LCD process, the first one for the AlNd Gate metal layer of material to affect change AlNiLa. The material selection alkaline free substrate (size: 730 × 920 mm; provided by Corning), the array five masks on the original process, only in a change in production parameters, then use the experimental design to find the best conditions, and to Array and electrical yield results as the final decision, are required to meet current standards in order to determine the import of this metal layer is successful. By the experimental results, the use of experimental design can be PVD and ETCH process in the best conditions for extraction, re-use hypothesis testing, t test (2 sample t) and ANOVA test method (two-way ANOVA), to determine the import after the AlNiLa and electrical properties of the yield is significantly better than the previous import, so import is successful, but also the basis of statistics, so the risks can be effectively controlled, and can be saved for two thousand one hundred companies million of annual expenditure costs. Finally, with the ETCH PVD process, it can be the best all access to a set formula (PVD: film-forming temperature 120 oC, film-forming power 35kw, film-forming gas _Ar 150 sccm; ETCH: photoresist baking time 10 sec, been etching rate of 0%, etching temperature 40 oC), so AlNiLa into the Gate metal layer can be optimized to achieve quality results. |
URI: | http://140.113.39.130/cdrfb3/record/nctu/#GT079669509 http://hdl.handle.net/11536/43826 |
Appears in Collections: | Thesis |