2.45/5.2 GHz雙頻帶低功率直接降頻諧波混波器之設計

Abstract

本篇論文主旨在於利用標準0.18um CMOS製程設計適用於無線區域網路802.11a/b接收器之2.45/5.2 GHz雙頻帶低功率直接降頻諧波混波器。此外，一個適用於802.11a之窄頻5.2GHz階段增益諧波混波器也將在本論文被設計與分析。此兩個諧波混波器已經由晶片製作驗證。 第一顆晶片在設計與分析一個適用於5.2GHz頻帶無線區域網路之階段增益諧波混波器。此諧波混波器利用連接差動對的汲級消除奇次諧波及電感性帶有增益之三階濾波器加大二階諧波振幅，達到在有限電流下增益及雜訊指數最佳效能。藉由並聯開關控制，模擬結果諧波混波器有18dB及8.7dB兩種增益模式，在高增益模式下其雜訊指數在1MHz基頻頻率為16dB，輸入三階交叉點(IIP3)為-3.1dBm。在低增益模式下其雜訊指數在1MHz基頻頻率為25.7dB，輸入三階交叉點(IIP3)為-5.6dBm。以-10dBm的差動LO訊號注入。在1.8V供壓，其消耗功率約為4.6mW。 在第二顆晶片中，一個適用於無線網路802.11a及802.11b接收器之2.45/5.2 GHz雙頻帶低功率直接降頻諧波混波器將被設計與驗證。利用開關控制可變突起頻率之三階濾波器選擇工作頻率，使諧波混波器可工作在2.45GHz或5.2GHz兩個頻率。模擬結果在2.45GHz之工作頻率下，其輸入返回損耗(S11)為-11dB，轉換增益為16.7dB，雜訊指數為15.5dB，三階交叉點(IIP3)為-6dBm。在5.2GHz之工作頻率下，其輸入返回損耗(S11)為-12dB，轉換增益為18.9dB，雜訊指數為13.5dB，三階交叉點(IIP3)為-1dBm。在1.8V供壓及-10dBm差動LO訊號，其功率消耗約為2.3mW。

The aim in this thesis is mainly based on the design of 2.45/5.2 GHz dual-band low-power direct-conversion harmonic mixer in the receiver front-end of 802.11a/b wireless local area network (WLAN) system using standard 0.18um CMOS process. Also, a narrow band 5.2GHz step-gain direct-conversion harmonic mixer is designed and analysis for 802.11a WLAN system. The two harmonic mixers were verified through individual chips. In the first chip, a 5.2GHz step-gain direct-conversion harmonic mixer for 802.11a WLAN system is designed and analyzed. The harmonic mixer cancels the odd harmonic of LO signal by connecting the drains of the differential pair. It adopts a third-order low-pass filter with inductive peaking increasing the second harmonic level. This optimizes conversion gain and noise performance with a restricted bias current. Controlled by a switch, the simulation result shows that the mixer offers two gain levels of 18dB and 8.7dB. At high-gain mode, it achieves noise figure of 16dB at 1MHz frequency, and third-order input intercept point of -3.1dBm. At low-gain mode, it achieve noise figure of 25.7dB at 1MHz, and third-order input intercept point of -5.6dBm. Differential LO power level is chosen as -10dBm. With a supply voltage of 1.8V, the total power consumption is about 4.6mW. In the second chip, a 2.45/5.2 GHz dual-band low-power direct-conversion harmonic mixer for 802.11a/b WLAN system is introduced. By tuning the peaking frequency of third-order low-pass filter, it can choose the operation frequency either in 2.45GHz or in 5.2GHz band. Simulation result shows that in 2.45GHz operation frequency, it achieves S11 of -11dB, conversion gain of 16.7dB, noise figure of 15.5dB, and third-order input intercept point of -6dBm. In 5.2GHz operation frequency, it achieves S11 of -12dB, conversion gain of 18.9dB, noise figure of 13.5dB, and third-order input intercept point of -1dBm. With1.8V power supply and -10dBm differential LO signal, the power consumption is about 2.3mW。