探討鈦摻雜在氧化鎳電阻式記憶體上之效應

Abstract

摘要

隨著數位行動生活的到來，非揮發性記憶體在可攜式電子產品，如：手機、數位相機跟筆記型電腦扮演著重要的角色。快閃記憶體是現今非揮發性記憶體的主流，但是它有著許多缺點，包含：高的操作電壓、低的操作速度與較差的耐久力。近年來因傳統快閃式記憶體在不斷微縮下，面臨了許多急欲克服之難題，例如儲存在懸浮閘極中之電荷，因穿遂氧化層過薄而隨時間漸漸流失，造成資料流失；此外，在長時間操作之下，易在穿遂氧化層內產生缺陷以及操作電壓過高等瓶頸，因此加快了下世代非揮發性記憶體之研究腳步。所以，下世代非揮發性記憶體有：鐵電記憶體、磁記憶體與電阻式記憶體等等，因為有改良上列缺點的優勢，受到很多的矚目並大量快速的投入研究。 現今，電阻轉態現象已於許多材料中被觀察到了，我們粗略的分為四類(1)有機高分子材料、(2)固態電解質、(3)鈣鈦礦材料像，鋯酸鍶、鈦酸鍶與錳酸鐠鈣；(4)過渡金屬氧化物，像氧化鎳、氧化鈦、氧化鋯與氧化銅等。由於鎳金屬在電阻式記憶體上的材料便宜及構造簡單，韓國三星公司從2004年開始大量的研究氧化鎳電阻式記憶體，更於2004 年國際電子元件會議中(IEDM)，發表利用二元過渡金屬氧化物搭配0.18μm 製程， 成功製作出電阻式記憶體 。而在將把電阻式記憶體於商業化應用之前，還是有著許多重要、尚未瞭解的問題，包含：電阻轉態機制的基本原理和可靠度議題(如耐久性、重置電壓失敗、重置電壓在操作上的誤差等等)之爭議。本論文首先根據已發表之氧化鎳論文，把現今電阻式記憶體研究之重點、現況與理論做一整理、歸納與比較。在此，我們研究的重點在氧化鎳電阻式記憶體的深入探討和應用。 而在我們的實驗中，首先我們成功地製作出高溫反應式濺鍍成長的氧化鎳電阻式記憶體，並且利用一些電性和物性的分析來驗證為何在高溫成長才能有較好的特性。而在後半段的實驗部份，我們希望能夠成功的成長出常溫的氧化鎳電阻式記憶體並且探討鈦金屬所扮演的腳色。最後在結果上，我們確實成長出良好結果的常溫鈦摻雜氧化鎳電阻式記憶體，並且比較氧化鎳和鈦摻雜之氧化鎳在所有特性上的差異。配合物性的分析(XRD和XPS) ，我們發現在氧化鎳電阻式記憶體中，(200)晶格方向和限制三氧化二鎳的量扮演著重要的腳色，並且可以說明有鈦摻雜的室溫氧化鎳為何能夠成功的操作。最後，我們比較有無鈦摻雜的氧化鎳在電性及可靠度上的差別，來說明為何有鈦摻雜的氧化鎳在高阻態的穩定上有很明顯的落差。

Abstract For the coming of digital generation, nonvolatile memory (NVM) plays an important role in our life, especially for portable electronic products, such as the mobile phone, digital camera, and notebook etc. However, the problems of scaling limit for NVM are getting worse and serious for the CMOS technology under 40 nm [1-3]. Because the problems such as the retention time of NVM memory, scaling thickness of tunnel oxide, and the high program/erase (P/E) voltage increase the electrical field in tunnel oxide layer would deteriorate the endurance etc, the next-generation NVM memory is imperative. Therefore, the next-generation nonvolatile memories such as FeRAM, PCRAM, RRAM etc, have attracted extensive attention due to the conventional memories that approaching their scaling limits. Resistive switching phenomena have been observed in many materials, which can be roughly categorized into four groups (1) organic molecular materials, (2) solid state electrolytes (or called programmable metallization cell), (3) perovskite structures such as SrZrO3 (SZO), SrTiOx and Pr0.7Ca0.3MnO3, and (4) transition metal oxides (TMOs) such as NiO, TiO2, ZrO2, Cu2O, and etc. Base on the cheaper and simple structure of Ni material, Samsung have been investigated NiO RRAM for many years since 2004. There are still many important unresolved problems, including the original resistive switching mechanisms and the reliability issues (such as endurance test, reset failure, and variations of resistive switching parameters), which are all needed to be identified before realizing commercial applications. The major goals of the dissertation are to give more insights into these issues and find solutions to them. Here, we focus on the NiO RRAM and investigate for application. In our experiment, we fabricated successful NiO RRAM at high temperature depositional conditions at first, according to the different process of sample; we measured the electrical properties and thermal effect etc. After that, we try to fabricate NiO RRAM at RT by Ti incorporation for comparing and investigating the role of Ti in NiO RRAM. Finally, we have successfully fabricated NiO RRAMs using NiO deposited at 560℃ and Ti-doped NiO deposited at room temperature by dc reactive sputtering. Accordingly, we compare the NiO and Ti-doped NiO samples at all kind of characteristics. Based on the XRD and XPS analyses, it was found that the NiO (200) orientation and the suppression of the Ni2O3 state play important roles on the switching properties of the Ti-doped NiO RRAM. However, the retention of high resistance state in the Ti-doped NiO RRAM is degraded by the excess non-lattice oxygen defects.