多輸入多輸出系統之位元配置有限回饋

Abstract

本論文包含兩個部分，在第一個部分我們提出一個有限回饋位元配置的多輸入多輸出系統。我們會證明此系統可以達到全多樣性。在傳輸速率固定的假設下，我們推算出能達到最小錯誤率的最佳位元配置，並證明達到最小錯誤率的位元配置也是使用最低傳輸能量的位元配置。模擬結果顯示我們所提出的系統可以使用較少的回饋位元達到低錯誤率。在第二個部分我們針對傳統單階預先編碼器的有限回饋系統設計低複雜度的編碼器選擇準則。我們也提出一個可以降低複雜度的二階預先編碼器系統。模擬結果會展示出我們所設計的系統的可用性。

In this thesis we first proposed a limited feedback system which sends back only the bit allocation (BA) information. The system will be termed a BA system. we show that the proposed BA system can achieve full di- versity order. we will also derive the optimal bit allocation for minimum bit error rate when the transmission rate is given. Secondly, we develop low-complexity selection criteria for conventional one-step precoder system which feedbacks only the precoder information. A two-step system is pro- posed to reduce the number of searches. In simulations, the usefulness of the proposed systems will be demonstrated.