應用於高速數位用戶迴路之時域等化器設計

Abstract

論文中，我們提出一個時域等化器之設計應在高速用戶迴路通訊系統。此傳輸系統利用分頻多工傳輸來分開上游與下游之通信訊號。在下游（上游）的傳輸中上游（下游）之頻道不會被利用於傳輸在此稱做空頻道。如通道之次方數大於循環前置保護塊之長度，那麼在空頻道將會收到前後交錯訊號雜訊與通道雜訊。我們提出的時域等化器之設計方法運用在空頻道的能量來使等效通道之能量集中。本設計方法不需要知道原通道之脈衝響應。設計例子將會顯示所提出之方法能夠設計良好能使能通道量集中的時域等化器。

In this paper, we propose a semi-blind TEQ design method for VDSL system. In the VDSL system FDD(Frequency Division Duplex) is used to separate upstream and downstream signals. In downstream(upstream) transmission the upstream(downstream) tones are not used and are referred as null tones. If the channel orderis larger than the length of cyclic prefix, the null tone will contains the noise and ISI. The proposed TEQ design method exploit the null tone energy to shorten the channel. The design does not require the channel impulse response. Examples will be given to show that the method can design TEQ with good shortening effect.