標題: 利用尖角效應提高寫入電場於薄膜電晶體之記憶體元件應用
The Electrical Field Enhancement of Corner Effects on Thin-Film Transistor Nonvolatile Memories
作者: 林岷臻
Lin, Mic-Chen
趙天生
Chao, Tien-Sheng
電子物理系所
關鍵字: 薄膜式電晶體;尖角效應;記憶體;特殊結構;Thin film transistor;Corner effect;Memory;special structure
公開日期: 2010
摘要: 我們提出一種新穎的結構來提高薄膜電晶體之非揮發性記憶體SONOS型記憶體的寫入與抹除特性。而這個方法不僅僅非常簡單也可運用於日後的三維結構製程技術中,且仍然能維持良好的可靠度;在此篇論文當中,我們成功的利用傳統元件的LOCOS的概念與方法,使在通道的寬度方向上尖角數量的增加,並對尖角數量的增加去做了更進一步的電性探討與可靠度的量測。在寫入與抹除操作的選擇上,我們分別選擇FN穿隧注入(FN tunneling) 與基板暫態熱電洞注入(Substrate transient hot-hole injection) ,利用局部電場在尖角二端的集中可提升其記憶體電子注入的速度與電洞的抹除。此結構的另外一個優點是其尖角為較圓滑的轉角,故可以改善由載子的不均勻注入而產生的雙峰(Double Hump)。 不同的氧化厚度會使通道寬度方向的尖角有不同的平台寬度與高低差,而其氧化厚度分別為100 nm、150 nm;我們發現並不是氧化厚度越厚所造成的尖角高低落差越大,對於記憶體特性的提升就越大,而是由有效通道寬度的長度去決定,較長的通道寬度會抑制對寫入/抹除速度的提升。 此結構擁有相當多的優點,包含了較快速的寫入速度、在高溫下仍有良好的可靠度特性以及對通道寬度有相當高的相依性。所以此技術有相當大的潛力於未來的記憶體市場。
For the first time, we propose a special structure to enhance the characteristic of TFT-SONOS memory devices. The memory process is not only simple but also compatible with 3D circuit integration. In this thesis, we investigate the effect of corners along channel width direction on TFT-SONOS memory. The experiments in this study used a local-oxidation of silicon (LOCOS) scheme to fabricate an M-shape in the width direction of TFT-SONOS memory. The programming and erasing operations are performed by the FN tunneling (FN) and Substrate transient hot-hole (STHH) injection, respectively. The improvement of M-shape TFT-SONOS memory is due to the locally electrical field enhancement at corners. On the other hand, the other advantage of this corner structure is the rounded corners improve the “Double Hump” situation. “Double Hump” would be caused by non-uniform charges injection. Different oxidation thickness would make the platform and structure off-set of corners are different. The oxidation thicknesses are 100 nm and 150 nm, respectively. The more oxidation makes the higher structure off-set, but it is not direct related devices performance. We found out not the longer of effective width would depress the improvement of program/ erase speed. The design exhibits superior electrical performance, including faster program/ erase speed, excellent data retention at high temperature, and width dependence. Thus, it has the larger application potential for flash memory market in the future.
URI: http://140.113.39.130/cdrfb3/record/nctu/#GT079721522
http://hdl.handle.net/11536/45009
Appears in Collections:Thesis


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