以NMOS電阻作0.2ppm/C 曲線補償能隙參考電壓電路

Abstract

在能隙參考電壓電路以曲線補償來降低非線性項的影響是近年來研究設計能隙參考電壓電路的一重要課題。 其中有以不同溫度係數的電阻產生高階項或利用BJT的beta(T)對溫度的特性來降低非線性項的效應。 本論文提出一個新架構來降低非線性項的影響。我們利用 NMOS 在三極區工作時其可視為一壓控電阻; 此電阻值在閘源極電壓不變時由於電子遷移率隨溫度增加而降低，因此電阻值之隨溫度變化是正溫度係數但是非線性。 而由此非線性的溫度係數，即可用來補償非線性項產生的溫度係數， 進而將輸出參考電壓對溫度變化的敏感度降的更低。我們並以台積電 0.35 um 3P3M SiGe BiCMOS 製程來實現此參考電壓電路。經後段模擬結果 (Post-Sim)，本電路輸出電壓值為 1.15 V， 溫度係數為 0.2 ppm/C，消耗功率是 1.5 mW，電源電壓雜訊抑制比在 100 Hz 時為 -59 dB。

In the bandgap reference circuit, applying the curvature-compensated technique to reduce the effect of the nonlinear dependence of the base-emitter voltage with temperature is an important research topic in recent years. Several approaches using high-order temperature-dependent resistors or the temperature characteristics of the current gain beta of a bipolar transistor have been proposed. This thesis presents a new curvature-compensated bandgap voltage reference; the circuit uses the voltage control resistance of an NMOS operated in the triode region to generate a nonlinear dependence with positive temperature coefficients because the electron mobility decreases as the temperature increases. This nonlinear dependence is used to compensate for the nonlinearity of the base-emitter voltage with temperature. The proposed circuit is implemented using the TSMC 0.35um 3P3M SiGe BiCMOS technology. The design IC, after post simulation, attains the output reference voltage 1.15 V, temperature coefficient of 0.2 ppm/C,power consumption 1.5 mW and power supply noise rejection ratio -59 dB at 100 Hz.