在無串擾位元變化編碼之指令匯流排中利用暫存器重新標記以減少匯流排的耗電

Abstract

隨著製程進步至深亞微米級 (deep submicron level)，crosstalk在深亞微米級製程之匯流排中的影響越受重視。而當兩條鄰近匯流線上的訊號轉換方向相反時，稱之為crosstalk-toggling transitions，所帶來的影響不只是更多的耗電，也帶來更長的傳送延遲。現有相當多的研究是在同步電路設計 (synchronous circuit designs) 中，利用編碼方式使匯流排上能夠完全排除串擾位元變化轉換來達到減少傳送延遲。對於其耗電則仍保有進一步降低的機會。 這篇論文主要是研究在無串擾位元變化的Selective Shielding匯流排編碼方法下，利用暫存器重新標記 (register relabeling)進一步降低指令匯流排之耗電。在不需要增加額外硬體需求及沒有效能損失的前提下，我們的設計是未編碼指令匯流排平均耗電的95.3%。此外，與Selective Shielding方法相較，在指令匯流排上可進一步減少12.1%的耗電。整體而言，我們的設計可保持原Selective Shielding方法無串音位元變化之特性並減少其耗電。

With process technology scale down to the deep submicron level, crosstalk effects are increasingly important considerations especially when adjacent bus lines switch in opposite directions (so called crosstalk-toggling transitions) on deep-submicron buses. Crosstalk-toggling transitions increase not only power consumption but also data transmission delays. While many bus encoding schemes have been proposed to totally avoid crosstalk-toggling transitions thus reducing data transmission delays in synchronous circuit designs, opportunities still exist to additionally reduce power consumption. Therefore, we propose a register relabeling algorithm to further reduce the instruction bus power consumption based on the existing Selective Shielding bus encoding scheme which guarantees the encoded bus being crosstalk-toggling free. With no extra hardware requirements and performance loss, the average energy consumption of our design is 95.3% compared with an un-encoded instruction bus using 90nm technology with a 14mm bus length, and is 12.1% less than that of an instruction bus with Selective Shielding coding. In summary, our scheme preserves the crosstalk-toggling free characteristic of the Selective Shielding method and saves more energy.