| 標題: | Suppression of boron penetration by using inductive-coupling-nitrogen-plasma in stacked amorphous/polysilicon gate structure |
| 作者: | Yang, WL Lin, CJ Chao, TS Liu, DG Lei, TF 電子物理學系 電子工程學系及電子研究所 Department of Electrophysics Department of Electronics Engineering and Institute of Electronics |
| 關鍵字: | MOS integrated circuits;plasma |
| 公開日期: | 19-六月-1997 |
| 摘要: | A method is introduced for suppressing the penetration of boron for BF2+-implanted pMOS devices with a stacked amorphous/ poly-Si (SAP) gate structure. It is shown that after inductive-coupling-nitrogen-plasma (ICNP) treatment, boron diffusion through the thin gale oxide is largely suppressed. As shown from the charge-to-breakdown measurements, the ICNP process will improve the quality of pMOS devices, with Q(bd) three times higher than for the control samples. |
| URI: | http://hdl.handle.net/11536/488 |
| ISSN: | 0013-5194 |
| 期刊: | ELECTRONICS LETTERS |
| Volume: | 33 |
| Issue: | 13 |
| 起始頁: | 1139 |
| 結束頁: | 1140 |
| 顯示於類別: | 期刊論文 |

