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dc.contributor.authorLi, Yih-Langen_US
dc.contributor.authorChen, Hsin-Yuen_US
dc.contributor.authorLin, Chih-Taen_US
dc.date.accessioned2014-12-08T15:06:19Z-
dc.date.available2014-12-08T15:06:19Z-
dc.date.issued2007-04-01en_US
dc.identifier.issn0278-0070en_US
dc.identifier.urihttp://dx.doi.org/10.1109/TCAD.2007.891381en_US
dc.identifier.urihttp://hdl.handle.net/11536/4906-
dc.description.abstractThe implicit-connection-graph-based router is superior to the tile-based router in terms of routing graph construction and point querying. However, the implicit connection graph has a higher degree of routing graph complexity. In this paper, a new multilayer implicit-connection-graph-based gridless router called NEMO is developed. Unlike the first implicit-connectiongraph-based router that embeds all routing layers onto a routing plane, NEMO constructs a routing plane for each routing layer. Additionally, each routing plane comprises tiles, not an array of grid points with their connecting edges, and consequently, the complexity of the routing problem decreases. Each grid point then represents exactly one tile or its left-bottom corner such that a tile query is equivalent to any point query inside the queried tile, and a grid maze becomes tile propagation. Furthermore, to accelerate path search, continuous space tiles are combined as a pseudo maximum horizontally or vertically stripped tile. Experimental results reveal that NEMO conducts a point-to-point path search around ten times faster than the implicit-connection-graph-based router. General-purpose routing by NEMO also improves routing performance by approximately 1.69x-55.82x, as compared to previously published works based on a set of commonly used MCNC benchmark circuits.en_US
dc.language.isoen_USen_US
dc.subjectphysical designen_US
dc.subjectroutingen_US
dc.titleNEMO: A new implicit-connection-graph-based gridless router with multilayer planes and pseudo tile propagationen_US
dc.typeArticle; Proceedings Paperen_US
dc.identifier.doi10.1109/TCAD.2007.891381en_US
dc.identifier.journalIEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMSen_US
dc.citation.volume26en_US
dc.citation.issue4en_US
dc.citation.spage705en_US
dc.citation.epage718en_US
dc.contributor.department交大名義發表zh_TW
dc.contributor.departmentNational Chiao Tung Universityen_US
dc.identifier.wosnumberWOS:000245190500009-
Appears in Collections:Conferences Paper


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