A NEW INTERNAL OVERVOLTAGE PROTECTION STRUCTURE FOR THE BIPOLAR POWER TRANSISTOR

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DC 欄位	值	語言
dc.contributor.author	WU, CY	en_US
dc.date.accessioned	2014-12-08T15:06:20Z	-
dc.date.available	2014-12-08T15:06:20Z	-
dc.date.issued	1983	en_US
dc.identifier.issn	0018-9200	en_US
dc.identifier.uri	http://hdl.handle.net/11536/4911	-
dc.language.iso	en_US	en_US
dc.title	A NEW INTERNAL OVERVOLTAGE PROTECTION STRUCTURE FOR THE BIPOLAR POWER TRANSISTOR	en_US
dc.type	Article	en_US
dc.identifier.journal	IEEE JOURNAL OF SOLID-STATE CIRCUITS	en_US
dc.citation.volume	18	en_US
dc.citation.issue	6	en_US
dc.citation.spage	773	en_US
dc.citation.epage	777	en_US
dc.contributor.department	交大名義發表	zh_TW
dc.contributor.department	電控工程研究所	zh_TW
dc.contributor.department	National Chiao Tung University	en_US
dc.contributor.department	Institute of Electrical and Control Engineering	en_US
dc.identifier.wosnumber	WOS:A1983SE37900022	-
dc.citation.woscount	1	-
顯示於類別：	期刊論文

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