以互補式金屬氧化物半導體積體電路設計21GHz-27GHz高增益低雜訊放大器之研究

Abstract

本篇論文主要是探討超寬頻低雜訊放大器之設計與分析。其中各部分所提出電路之晶片製作皆由TSMC 0.18μm mixed-signal/RF CMOS 1P6M製程來實現。 低雜訊放大器電路利用設計輸入端匹配電路和電晶體內部的回授電容去調整電路的增益和保持低雜訊，並且盡可能的降低輸入反射係數與輸出反射係數，設計輸入反射係數小於-10dB; 雜訊指數為4.5dB~6.5dB， 輸出反射係數小於-10dB，在供應電壓為1.8V的情況下，頻寬為21GHz~27GH，頻段內的增益約為15dB，輸出功率1dB壓縮點為-11dBm,晶片消耗功率為53mW，頻段之外的增益小於0dB，隔離度小於-30dB。並且保持是無條件穩定的情形。 電路由三級的疊接型和共源級放大器組成，各級間使用電容來隔絕閘級和汲級偏壓，做為偶合電容，並選用較大容值的電容做為旁通電容。第一級和第二級用兩顆電晶體串聯做成疊接型放大器,第三級用共源級電晶體做成緩衝器，電路中使用了電容、傳輸線、電阻三種被動元件。適當地選取被動元件的尺寸，使電路達到最佳的特性表現。

This thesis research in design method of wind-band low noise amplifier, All the proposed circuits were implemented in TSMC 0.18μm mixed-signal/RF CMOS 1P6M technology. The design method of low noise amplifier is to regulate the input match network and tuning the parasitical capacitance size in the metal-oxide-semiconductor field-effect transistor to get high gain and low noise output. Furthermore, reduce the input return loss and output reflection coefficient. Design the input return loss and output reflection coefficient is less than -10dB. The noise figure is between 4.5dB and 6.5dB. Under the condition the condition that we maintain the bias voltage is 1.8 Volt, this circuit has bandwidth from 21GHz to 27GHz. During the bandwidth, the gain in this circuit is 15dB, 1 dB compression point is -11dBm, the power consumption is 53mW, the gain in the frequency outside bandwidth is always less than 0dB, the isolation is less than -30dB, and maintain the circuit work unconditional stably. This circuit comprises three stages cascode and common-source amplifier. Each of stages has capacitance to separate the gate bias voltage and drain bias voltage, it is used to be a coupling capacitance that has large capacity. In first and second stage, using cascode topology with two series transistors set up the stage. In the third stage, using common-source topology with two series transistors set up the stage. In the circuit, we apply three passive component such as capacitance, transmission line, resistance. Choose the size of passive components, circuit to achieve the best performance of the characteristics.