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dc.contributor.author廖峻宏en_US
dc.contributor.authorLiao, Chun-Hungen_US
dc.contributor.author蔡娟娟en_US
dc.contributor.authorTsai, Chuang-Chuangen_US
dc.date.accessioned2014-12-12T01:57:44Z-
dc.date.available2014-12-12T01:57:44Z-
dc.date.issued2012en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#GT079924534en_US
dc.identifier.urihttp://hdl.handle.net/11536/49814-
dc.description.abstract近年來非晶氧化銦鎵鋅用作薄膜電晶體的主動層上被視為深具潛力的材料。此材料比起傳統非晶矽半導體具有高載子遷移率(~10 cm2/Vs),較低的工作電壓(<5V),以及其小的次臨界電壓擺幅。當要應用a-IGZO 薄膜電晶體於電子元件上,需要發展低損耗、高操作頻率以及良好的電特性,也就是朝高載子遷移率和低次臨界擺幅作為目標。許多技術可以提升電子特性,藉由連結上閘極與下閘極的雙閘極操控電晶體通道為其中一種技術。先前的研究中,利用一個新穎的製程結構-奈米點摻雜於通道上來有效提高a-IGZO TFTs的載子遷移率。我們提出在a-IGZO 通道上形成許多鄰近高導電的奈米點狀摻雜可以降低位障,藉此新的製程結構可以使上閘極電晶體的載子遷移率從4 cm2V−1s−1大幅提升至79cm2V−1s−1。 而在本文中,結合雙閘極操作電晶體與奈米點摻雜的技術,期望能在a-IGZO中降低垂直電場的影響進而提高效能。最後,我們在雙閘極操作下相比較上閘極與下閘極的電流合成功提升了1.5倍的電流,而使用上絕緣層的介電常數來萃取等效的載子遷移率,此雙閘極奈米孔洞結構a-IGZO 薄膜電晶體可達到272 cm2V−1s−1 上閘極奈米孔洞結構也可以達到102 cm2V−1s−1。zh_TW
dc.description.abstractRecently, a-IGZO is the high-potential material for active layer of thin film transistor. With a high mobility (>10 cm2/Vs) than conventional amorphous silicon semiconductor and a low operating voltage (< 5 V) and small sub-threshold voltage swing, amorphous In-Ga-Zn-O thin-film transistors (a-IGZO TFTs) draw a lot of attentions. When a-IGZO TFTs are developed for a low-power high-frequency circuit, good electron performances, such as high field-effect mobility (μFE) and low sub-threshold swing (S.S.) are required. Dual gate (DG) is one of the techniques to enhance the performance of a-IGZO TFTs by connecting top gate (TG) and bottom gate (BG) together to enhance the channel accumulation. In our previous work, we have demonstrated that the effective mobility of a-IGZO TFT can be greatly improved by utilizing nano-meter dot-like doping (NDD) in a-IGZO channel region. We proposed that the NDD structure lowers the potential barrier in the intrinsic a-IGZO by the neighboring high conductive regions and hence increase the field-effect mobility of TG a-IGZO TFTs from 4 to 79 cm2V−1s−1. In this work, we employ NDD in DG a-IGZO TFTs. By connecting TG and BG together, we expect to reduce the vertical field in a-IGZO film and to further enhance the mobility. We successfully obtain a 1.5-times enhanced output current in DG NDD a-IGZO TFT. Taking the gate capacitance of TG NDD as the reference, the effective mobility for TG NDD a-IGZO TFT and for DG NDD IGZO TFT are 102 cm2V−1s−1 and 272 cm2V−1s−1, respectively.en_US
dc.language.isoen_USen_US
dc.subject薄膜電晶體zh_TW
dc.subject銦鎵鋅氧四元化合物zh_TW
dc.subject雙閘極zh_TW
dc.subject高效能zh_TW
dc.subjectthin film transistorsen_US
dc.subjectIGZOen_US
dc.subjectDual gateen_US
dc.subjecthigh performanceen_US
dc.title具有奈米點摻雜之高效能雙閘極非晶銦鎵鋅氧薄膜電晶體zh_TW
dc.titleHigh Performance Dual Gate Amorphous Indium-Gallium-Zinc-Oxide Thin Film Transistor With Nanometer Dot-like Dopingen_US
dc.typeThesisen_US
dc.contributor.department光電工程學系zh_TW
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