立即的資料壓縮與解壓縮加速器在高度可擴充性DVB-MHP的JVM軟硬體協同設計

Abstract

在嵌入式即時系統中，記憶體的使用與電能的消耗一直是很重要的議題，我們在數位電視標準中的DVB/MHP的Java processor中，加入物件資料壓縮與解壓縮的機制，以達到較少的記憶體的使用、較低電量的消耗，進而提升整體的執行效率。

目前在JVM中，都採用軟體的方式來做資料壓縮與解壓縮的機制，這樣通常會造成整體的執行效率降低。我將設計硬體的壓縮與解壓縮加速器，利用硬體的平行度來提升整體的執行效能。 達到的目的，分別條列如下： (1) 減少記憶體的使用 (2) 達到低電量的消耗 (3) 減少整體執行時間

我們選用的實驗平台是Xilinx ML-310的嵌入式發展平台，可程式化的邏輯陣列，主要包含：兩個IBM Power PCTM 405(PPC 405)處理器、30816 Logic Cell、2,448 kb BRAM(block RAM)。

Multimedia Home Platform (MHP) is a digital video broadcasting (DVB) standard intended to combine digital television (DTV) with the Internet and the World Wide Web. An MHP setop box is a complicated embedded system that contains both multimedia and communication components. Memory size (includes both volatile and non-volatile memory devices) and power consumption is always the main concern when designing this kind of embedded devices. One of the critical components in a DVB-MHP setop box is the Java VM. To achieve the best performance/power consumption ratio, a dedicated Java processor is often used. The goal of this thesis is to design a runtime bytecode/data compression and decompression hardware logic to a Java processor for DVB-MHP applications.

Fo software-based Java VM, runtime bytecode/data compression and decompression are used to reduce the memory usage. However, the performance of the system usually decreases due to the extra overhead. To maintain performance while reducing memory usage, a hardware accelerator for real-time compression/decompression with parallel datapaths is a reasonable aproach. The proposed hardware design is implemented and verified on an FPGA platform, Xilinx ML310. Based on the experimental results, the proposed architecture is very efficient and promising for practical applications.