支援多輸入多輸出無線通訊應用之可控制化記憶體設計與實作

Abstract

這個論文實現了一個可變式記憶體系統，提供給使用MIMO-OFDM系統的無線通訊平台使用。利用MIMO-OFDM系統下，不同天線間會使用相同的硬體及相似的資料處理流程的特性，去實作一個可以不改變硬體架構，使用軟體去更改執行流程，以因應不同通訊規格的無線通訊平台。而這個論文中所提出的記憶體系統，將可變的概念實作在記憶體的架構中，可以不用更改記憶體的整體架構就可以處理不同的資料格式。目前所實作的規格可以支援LTE及802.11ac兩種不同的通訊規格，在LTE的規格下可以支援1、2、4三種天線數，在FFT點數上則可支援1024點，而802.11ac則可支援1、2、4、6四種天線數，而FFT點數則可支援128、256及512點三種點數。 整體架構則主要分為大量的輸入資料的處理及資料儲存。在處理大量輸入的資料上，是使用排程的概念，利用不同的排程達成使用固定的硬體可以處理不一樣的資料輸入規格。而在資料儲存的部分，是將原本分散給不同演算法的記憶體集中為一個中央集中的記憶體系統，集中的記憶體除了可以節省記憶體的使用量外，還有利於動態分配記憶體。在這個系統中的資料儲存都是使用虛擬位址的方式搭配上動態分配記憶體，分配記憶體的大小最小可以到單個word，這使得記憶體的使用非常有彈性可以去配合不同的資料格式，並且也不容易產生記憶體的畸零空間，提高記憶體的使用率。這個論文中提出的架構主要由上述的兩個部分所組成，利用排程及動態記憶體分配等方法實作出一個可變式的記憶體系統。

This thesis proposes and implements a reconfigurable memory system for multiple-input and multiple-output orthogonal frequency division multiplexing (MIMO-OFDM) system for wireless application. By utilizing the signal processing operations and hardware requirements are quite similar among different antenna branches in MIMO-OFDM system, the feature is used to implement software controlled wireless communication platform which can execute variety specification without re-design the hardware architecture. The concept of reconfigurable is applied in the proposed memory system of this thesis which makes the memory can process different amount and format of data without re-design the system architecture. The proposed reconfigurable memory system can support two type of wireless communication specifications, long term evolution (LTE) and IEEE 802.11ac, three kinds of antenna number (1, 2, 4) and 1024 FFT points in LTE specification is provided in the proposed platform. And the support mode of 802.11ac specification is four kinds of antenna number (1, 2, 4, 6) and three kinds of FFT point (128, 256, 512). The architecture of this system is divided into two parts, one is data flow management (DFM) and on-demand memory, another is the concept of scheduling is used in data flow management to deal with the large amount of continuous input data stream. The software parameter is used to select the scheduling to finish the data process in different specification with fixed hardware. In the part of on-demand memory, the distribution memory for each data process module is collected into a centralize memory system to reduce the memory cost and increase the benefit of dynamic memory allocation. The virtual address and dynamic memory allocation is used to improve the scalability of memory system in this work. And the minimum of allocated memory size is a single word (32 bits) which makes the memory allocation is more flexible and lower the probability of the fragment to raise the memory Utilization. This thesis provides architecture which combines the above two parts and uses the method of scheduling and the dynamic allocation to implement the reconfigurable memory system.