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dc.contributor.authorWu, Chung-Yuen_US
dc.contributor.authorChen, Sheng-Haoen_US
dc.contributor.authorWu, Yuen_US
dc.date.accessioned2014-12-08T15:06:44Z-
dc.date.available2014-12-08T15:06:44Z-
dc.date.issued2010-06-01en_US
dc.identifier.issn1549-8328en_US
dc.identifier.urihttp://dx.doi.org/10.1109/TCSI.2009.2031704en_US
dc.identifier.urihttp://hdl.handle.net/11536/5296-
dc.description.abstractA CMOS ratio-memory cellular nonlinear network (RMCNN) requiring no elapsed time is proposed. The correlations between any two neighboring cells are stored in the memories. The ratio weights of each cell are generated through a comparison of the four correlations around one cell with the mean value of these four correlations. With this method, the elapsed time required by the previously existing RMCNN algorithm is no longer required and, therefore, the ratio weights can be generated individually. Moreover, the use of multi-dividers can be avoided to make the circuit simple. Based on the proposed algorithm, a CMOS RMCNN chip requiring no elapsed time has been designed and fabricated using TSMC 0.35-mu m 2P4M mixed-signal technology. In the fabricated chip, three test patterns can be learned and recognized.en_US
dc.language.isoen_USen_US
dc.subjectCellular nonlinear networks (CNN)en_US
dc.subjectCMOSen_US
dc.subjectelapsed timeen_US
dc.subjectratio memory cellular nonlinear networks (RMCNN)en_US
dc.titleDesign and Analysis of a CMOS Ratio-Memory Cellular Nonlinear Network (RMCNN) Requiring No Elapsed Timeen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/TCSI.2009.2031704en_US
dc.identifier.journalIEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERSen_US
dc.citation.volume57en_US
dc.citation.issue6en_US
dc.citation.spage1348en_US
dc.citation.epage1357en_US
dc.contributor.department電機學院zh_TW
dc.contributor.departmentCollege of Electrical and Computer Engineeringen_US
dc.identifier.wosnumberWOS:000281783800022-
dc.citation.woscount0-
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