完整後設資料紀錄
DC 欄位語言
dc.contributor.authorLiu, Po-Tsunen_US
dc.contributor.authorChou, Yi-Tehen_US
dc.contributor.authorSu, Chih-Yuen_US
dc.contributor.authorChen, Hung-Mingen_US
dc.date.accessioned2014-12-08T15:06:58Z-
dc.date.available2014-12-08T15:06:58Z-
dc.date.issued2010-11-25en_US
dc.identifier.issn0257-8972en_US
dc.identifier.urihttp://dx.doi.org/10.1016/j.surfcoat.2010.10.011en_US
dc.identifier.urihttp://hdl.handle.net/11536/5456-
dc.description.abstractThis study investigates the feasibility of using electroless plating (ELP) technology to manufacture copper (Cu) gate electrodes in thin film transistors (TFTs). The problem of poor adhesion between Cu and glass substrates is overcome by introducing ELP nickel-phosphorus (NiP) layers. Copper pattern formation with a desired taper can be self-aligned subsequently on a NiP layer without any layer etching process. ELP Cu film shows an obvious (111) preferred orientation, which may enhance the electrode's anti-electromigration ability. The electrical characteristics of the ELP Cu gate TFT are also similar to those of the sputter-deposited Cu gate TFT. Crown Copyright (C) 2010 Published by Elsevier B.V. All rights reserved.en_US
dc.language.isoen_USen_US
dc.subjectElectroless platingen_US
dc.subjectThin film transistorsen_US
dc.subjectSelf-aligneden_US
dc.titleUsing electroless plating Cu technology for TFT-LCD applicationen_US
dc.typeArticle; Proceedings Paperen_US
dc.identifier.doi10.1016/j.surfcoat.2010.10.011en_US
dc.identifier.journalSURFACE & COATINGS TECHNOLOGYen_US
dc.citation.volume205en_US
dc.citation.issue5en_US
dc.citation.spage1497en_US
dc.citation.epage1501en_US
dc.contributor.department光電工程學系zh_TW
dc.contributor.department顯示科技研究所zh_TW
dc.contributor.departmentDepartment of Photonicsen_US
dc.contributor.departmentInstitute of Displayen_US
dc.identifier.wosnumberWOS:000285487700057-
顯示於類別:會議論文


文件中的檔案:

  1. 000285487700057.pdf

若為 zip 檔案,請下載檔案解壓縮後,用瀏覽器開啟資料夾中的 index.html 瀏覽全文。