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dc.contributor.authorHsu, Hsing-Huien_US
dc.contributor.authorLin, Horng-Chihen_US
dc.contributor.authorHuang, Tiao-Yuanen_US
dc.date.accessioned2014-12-08T15:07:08Z-
dc.date.available2014-12-08T15:07:08Z-
dc.date.issued2010-04-01en_US
dc.identifier.issn0018-9383en_US
dc.identifier.urihttp://dx.doi.org/10.1109/TED.2010.2041857en_US
dc.identifier.urihttp://hdl.handle.net/11536/5605-
dc.description.abstractIn this paper, we characterize and compare the characteristics of a poly-Si nanowire (NW) device with independent double-gated configuration under different operation modes. In the device, the tiny NW channels are surrounded by an inverted-T-shaped gate and a top gate. It is found that the device under double-gate (DG)mode exhibits significantly better performance with respect to the two single-gate (SG) modes, as indicated by a higher current drive than the combined sum of the two SG modes and a smaller subthreshold swing of less than 100 mV/dec. Origins of such improvement have been identified to be due to the elimination of the back-gate effect as well as an enhancement in the effective mobility with the DG operation.en_US
dc.language.isoen_USen_US
dc.subjectDouble gate (DG)en_US
dc.subjectmobilityen_US
dc.subjectnanowire (NW)en_US
dc.subjectpoly-Sien_US
dc.subjectthin-film transistor (TFT)en_US
dc.titleOrigins of Performance Enhancement in Independent Double-Gated Poly-Si Nanowire Devicesen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/TED.2010.2041857en_US
dc.identifier.journalIEEE TRANSACTIONS ON ELECTRON DEVICESen_US
dc.citation.volume57en_US
dc.citation.issue4en_US
dc.citation.spage905en_US
dc.citation.epage912en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000275998500021-
dc.citation.woscount2-
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