一個提供超純量多處理機系統設計之記憶體子系統模擬及其評估環境

Abstract

對一多處理機系統而言，一記憶體系統架構設計之好壞，對此多處理機系 統效能有很大的影響。因此，在設計一多處理機系統時，有關其記憶體系 統設計上的探討，就顯得格外地重要。本論文之目的在對超純量多處理機 之記憶體子系統設計上的重要考慮作探討，其包括了共享記憶體架構， cache 一致協定 (cache coherence protocols) 及記憶體一致性模式 (memory consistency models) 等。並據此設計一記憶體模擬系統，作為 系統研究設計上之重要評估環境。在文中，將對我們設計的記憶體系統之 設計理念方法及其建立的方式做一詳細的說明。目前我們已將此記憶體模 擬系統建立於 SUN SPARC 及 IBM RS/6000工作站上，並完成初步的測試 驗證工作。同時我們也利用若干標竿程式( benchmark programs) 在此模 擬系統做模擬評估，所得之結果可提供未來設計之重要參考。 For the multiprocessor system, the design of memory system architecture well or bad, related to the performance of the multiprocessor system. So, the study of memory system design plays more and more important role in high performance multiprocessor system design. In this thesis, we will study the issues of superscalar-based multiprocessor memory subsystem design. They includes the architecture of shared memory, the cache coherence protocols,and the memory consistency models ect. According to these issues, we have developed a memory simulation, as an important evaluation environment for the system research and design. And we will show our design principle and implement method in detail. We have implemented the memory simulation on the SUN SPARC and IBM RS/6000 workstation. As the whole, under our simulations and evaluations, we have obtained many valuable results which are very useful for our future design and development.