高能量離子佈植反擴散分佈井CMOS之研究

Abstract

在CMOS電晶體技術中,以高能離子佈植形成反擴散井(Retrograde-well)已 被提出來取代傳統擴散井.這高能離子佈植技術減少了在高溫中的製程時 間,因而增加了元件密度及設計彈性.在本論文中,以單電荷離子佈植形成 反擴散P-型井及以雙電荷離子佈植形成反擴散N-型井皆被使用在CMOS元件 中.在反擴散P-型井中,N+擴散區和N-基體間的絕緣效果以及反擴散井造成 的場絕緣效果都能達到不錯的程度.在NMOS元件中,使用大傾斜角度佈植汲 極(LATID),和在PMOS元件中使用包圍佈植(Pocket Implant)的方法也將被 討論.而且,對於CMOS元件的特性如:窄通道效應,基體效應,短通道效應,鎖 住,和可靠性也都將探討.我們得到,使用較低LATID佈植劑量(2.6E13cm-2) 及較高反擴散井濃度 (佈植能量:180keV,佈植劑量:1E13cm-2)的0.5um NMOS元件,當操作在3.3V電壓時,有較佳的關閉效果.然而,卻遭遇較嚴重 的"側壁感應退化".對於建造於反擴散N型井中的0.6um PMOS元件,以360 keV井佈植能量及2E12cm-2井佈植劑量的條件,顯示較佳關閉效果及場絕緣 效果. The retrograde-well process using high energy ion implantation for CMOS technology has been proposed to instead of the conventional diffusion well. The high-energy ion implantation technology eliminates the need for process time at high temperature. This increase the packing density and the flexibility in device design. In this thesis, the retrograde P- well using single charged ion implantation and the retrograde N- well using double charged ion implantation are implemented in CMOS devices. The vertical isolation between the N+ diffusion and the N-substrate for retrograde P-well and the field isolation offered by the retrograde well without additional field implant can be also obtained with an acceptable level. The LATID process for NMOS devices and pocket implant process for PMOS devices are compared and addressed. Furthermore, the CMOS devices characteristics including narrow width effect, body effect, latchup, and device reliability are also discussed. It is found that 0.5um NMOS device created in retrograde pwell with lower implant dose(2.6E13cm-2) LATID and higher concentration retrograde well(180keV implant energy and 1E13 cm-2 implant dose) shows the better turn off effect for 3.3V operation. However, it suffers from more serious "spacer induced degradation". For 0.6um PMOS device created in retrograde nwell, the condition of 360keV implant energy and 2E12cm-2 implant dosage shows the better turen off characteristics and field isolation effect.