分散式處理的序向電路測試圖樣產生器

Abstract

本篇論文中,針對序向電路我們提出兩種方法來平行處理測試圖樣的產生, 第一種是使用多重啟發搜尋(multiple heuristics search)的方式,第二 種方法是對障礙做切割平行處理。。根據以上所提的兩種方法,我們再以 網路連接的 SUN Classic工作站上用C語言寫成程式經過實驗結果顯示,分 散式處理可以得到較佳的效率。 In this thesis we presented two distributed test generation system for sequential circuits. One uses a simulation-based test generator to be the central generator. And a multiple heuristics search method is proposed which may generate more effective pattern. The other uses a line-justification test generator, and a fault parallelism techniaue is used which can speed up the test generation. Two distributed test generation systems were implemented in the C language to run on a loosely-coupled network environment. The experimental results show that higher performance can be achieved than for a single machine.