互補金氧半高階迴路雜訊轉移之超取樣數位類比轉換器的分析與設計

Abstract

本論文探討一種新型的利用高階迴路雜訊轉換的數位類比轉換技術,這種 迴路架構是由一組向前與向後的回授系統改良而成, 這種回授濾波器的功 能有如高通濾波器般降低在訊號頻帶的量化雜訊, 但不會限制輸入訊號. 從分析結果得知, 此回授濾波器的 -3dB 點是一個很重要的參數, 它可使 濾波器在較高階時依然保持穩定, 且可得到最佳化的結果.在本論文中, 以四階迴路濾波器為例, 設計出其實驗電路架構, 並以 0.8um CMOS 的製 程技術佈局完成, 且部份電路架構榮獲中華民國專利 (發明62710). 又 電路佈局面積為 2.2x2.7 mm2, 若 8 仟閘. 在 20kHz 頻帶, 64 超取樣 下, 最高可得 103dB 訊號雜訊比. 此電路中的運算單元皆以高階硬體描 述語言( VHDL )設計, 並由解析工具解譯成電路,電路佈局也由程式自動 完成. n this thesis, a novel CMOS high-order of delta-sigma odulator for the oversampling D-to-A converter is presentednd analyzed. The modulator has modified a loop filter witheedback and feedforward coefficients. This loop filter wouldreatly reduce the quantization noise in the baseband. Thenalysis results show that the cutoff frequency of the loopilter is an importance parameter that controls theptimization the modulator and stability is not a limitationo higher-order modulators. An experimental fourth-orderodulator was designed using the design rule of 0.8um CMOSrocess technology. A part of circuit structure has gottenpatent of R.O.C. (No.62710). The size of the actual layouts 2.2x2.7 mm2, and the number of gates is about 8k. It isossible to achieve 103-dB dynamic range over the 20kHz audioandwidth with a oversample rate of 64. The chip is operatedn 20.48MHz. All the arithmetic units were designed by VHDLnd synthesis tool. Its layout was automatically generated bysing a routing program.