VLSI可靠性中由熱載子產生氧化層傷害的模式與模擬

Abstract

在本論文中，首先，吾人藉由電荷幫浦法發展出一套方法來描述界面狀態 的空間分佈。依最近的研究報告指出，只有在閘極電壓約等於一半汲極電 壓的區域所得到的界面狀態，才能夠以次方法則的關係來描述。對於元件 作在其它偏壓條件下而言，由於氧化層陷阱電荷會影響電荷幫浦電流。因 此，次方法則不再準確預估界面狀態特性。依界面狀態初值大於氧化層陷 阱電荷的假設，界面狀態和氧化層陷阱電荷便能被區分出來。為了達到元 件或電路可靠度模擬的目的，我們發展出一套具有解析形式的汲極電流模 型。這個模型包括了界面狀態引發的移動率退化等物理觀念，而且還可將 界面狀態和氧化層陷阱電荷的空間分佈加進電路模擬器來驗證量測結果的 正確性。進一步地，依據造成增加性退化的暫態效應，加強因數為輸入波 型下降時間的函數，它可由實驗及模擬推導而得。考量上述因數的虛擬靜 態方法可以用來模擬在交工作下的元件行為及退化特性。結果顯示，不管 在工作前或工作後模擬值與實驗值都具有定性上的一致性。 In this thesis, first, a methodology is develope to the spatial distribution of interface states (Nit) by way of charge-pumping method. As recently reported, only in the region (VGS=VDS/2), the characterized interface states can be decribed by the power law relationship, For devices stressed under other conditions, the power law for Nit is no longer valid in that the oxide trap charges (Qox) have influence on the charge-pumping currnet. Based on the assumption that the initial quantity Nit is large than Qox, the interface states and oxide trap charges can thus be seperated. For the purpose of device or circuit simulation, we have developed a drain current model in an form, in which the physical models of the interface-state-induced mobility degradation have been taken into account. The spatial distributions of Nit and Qox can thus be incorporated into a simulator - Hotspice to justify the validity of the measurement results. Moreover, due to the transient effect which causes the enhaced degradation, enhacement factors are characterized as a function of input waveform fall time, which can be derived from experiment and simulation. The quasi-static method by such factors can be employed to simulate the device behaviors and the associated degradations under AC stress. results shows that simulations are well in qualitative agreement with experimental before and after the stress.