完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Shih, Horng-Yuan | en_US |
dc.contributor.author | Kuo, Chien-Nan | en_US |
dc.contributor.author | Chen, Wei-Hsien | en_US |
dc.contributor.author | Yang, Tzu-Yi | en_US |
dc.contributor.author | Juang, Kai-Chenug | en_US |
dc.date.accessioned | 2014-12-08T15:07:28Z | - |
dc.date.available | 2014-12-08T15:07:28Z | - |
dc.date.issued | 2010-02-01 | en_US |
dc.identifier.issn | 0018-9200 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1109/JSSC.2009.2036320 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/5885 | - |
dc.description.abstract | A 250 MHz analog baseband chain for Ultra-Wideband was implemented in a 1.2 V 0.13 mu m CMOS process. The chip has an active area of 0.8 mm(2). In the analog baseband, PGAs and filters are carried out by current-mode amplifiers to achieve wide bandwidth and wide dynamic range of gain, as well as low noise and high linearity. Besides, a current-mode Sallen-Key low-pass filter is adopted for effective rejection of out-of-band interferers. A 6th-order Chebyshev low-pass filter realized in G(m)-C topology is designed in the baseband chain for channel selection. Digitally-assisted DC-offset calibration improves second-order distortion of the entire chain. The design achieves a maximum gain of 73 dB and a dynamic range of 82 dB. Measured noise figure is 14 dB, an IIP3 of -6 dBV, and IIP2 of -5 dBV at the maximum gain mode. The analog baseband chain consumes 56.4 mA under supply of 1.2 V. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | Analog filter | en_US |
dc.subject | current-mode filter | en_US |
dc.subject | current-mode VGA | en_US |
dc.subject | DC offset calibration | en_US |
dc.subject | analog baseband | en_US |
dc.subject | ultra wideband | en_US |
dc.title | A 250 MHz 14 dB-NF 73 dB-Gain 82 dB-DR Analog Baseband Chain With Digital-Assisted DC-Offset Calibration for Ultra-Wideband | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1109/JSSC.2009.2036320 | en_US |
dc.identifier.journal | IEEE JOURNAL OF SOLID-STATE CIRCUITS | en_US |
dc.citation.volume | 45 | en_US |
dc.citation.issue | 2 | en_US |
dc.citation.spage | 338 | en_US |
dc.citation.epage | 350 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000274210900007 | - |
dc.citation.woscount | 14 | - |
顯示於類別: | 期刊論文 |