不同閘極結構高壓複晶矽薄膜電晶體的二維模擬與分析

Abstract

近年來， 複晶矽薄膜電晶體（poly-Si TFT）被廣泛的應用在液晶顯示器 和記憶元件上。 而且不同結構的複晶矽薄膜電晶體也被開發出來。在論 文中 ， 我們建立一個可以模擬傳統複晶矽薄膜電晶體和外引式汲極薄膜 電晶體的模擬器。 建立此模擬器包含三個步驟（1）基本半導體方程式的 修正（2）適當的網格設定 和 （3）邊界條件的設定。根據我們發展的模 擬器，我們分析傳統複晶矽薄膜電晶體和外引式汲極複晶矽薄膜電晶體的 電特性，並且討論複晶矽薄膜電晶體和絕緣基板矽晶體（SOI）元件的差 異。因為寄生雙載子接面電晶體（BJT）電流受到抑制、複晶矽薄膜電晶 體的崩潰電壓比絕緣基板矽晶體為高。另外，我們亦比較傳統複晶矽薄膜 電晶體和外引式汲極複晶矽薄膜電晶體的電特性，外引式汲極複晶矽薄膜 電晶體的主要優點是汲極附近電場的降低。最後根據電流驅動能力，崩潰 電壓和製程步驟，我們提出一外引式汲極複晶矽薄膜電晶體的最佳化設計 。 Recently, poly-Si thin film transistors (poly-Si TFT's) are widely used in Liquid Crystal Displays(LCD's)and memory devices. Also, various structures of TFT's are developed. In this thesis, a simulator that can simulate the conven- tional TFT's and Field-Induced-Drain (FID) TFT's are establish- ed. This simulator was based on an existing simulator and involved: (1)an appropriate grid partition, (2) modifications of basic semiconductor equations and (3) the boundary condition for the given TFT structures. Based on the developed simulator as above, the electric characteristics of conventional TFT's and FID TFT's are studied. The current-voltage characterisics of poly-Si TFT' s and SOI devices are discussed. The breakdown voltages of poly-Si TFT's are higher than those of SOI devices because of their low electric field and suppressed parasitic BJT currents. Moreover, the breakdown characteristics of conventional TFT's and FID TFT's are also compared. The major advantage of FID TFT's is the reduced electric field. The optimum design of FID TFT's has been proposed.