新型電流偵測互補帶通式邏輯及其在低電壓低功率之應用

Abstract

在本論文中,我們利用帶通電晶體在低功率上的優點以及電流式電路在 低電壓擺幅的快速動作原理,發展了一個新型電流偵測互補式帶通電晶體 邏輯電路(CSCPTL)。隨著攜帶式個人電腦以及通訊電子設備的迷你化,低 電壓低功率電子電路已成為下一世代的消費性電子的關鍵性零組件。而省 電化及輕質化趨勢,在1.2伏工作電壓時,新電路提供了一個快速操作速 度, 它比互補式帶通電晶體邏輯(CPL)快了兩倍。而互補式帶通電晶體邏 輯是被認為在低電壓低功率數位電路應用上極具潛力的。本論文中對於 CSCPTL電路的操作原理以及對扇入的特性都有完整的分析,再者對於低電 壓時的驅動能力以及複雜邏及輯的實現能力都給予完整的模擬。為了驗證 模擬及分析的結果,一個以零點八微米互補式金氧半電晶體製程製作的實 驗晶片委託國科會晶片設計製造中心完成並且量測,由實驗結果得到驗證 。在本論文中並且對於帶通電晶體的邏輯推導做了說明並提供了一些實 例,新發展的電路的尺寸設計最佳化原則也在論文中做了適當的推導。 In this thesis,we had developed a new circuit, it is called Current-Sensing Complementary Pass-Transistor Logic(CSCPTL). By applying the advantages of pass-transistor and the fast sensing characteristic in low voltage swing, the proposed new circuit has advantages on low-volateg low-power operation. As the portable personal computer and consu,er electronic system needs is getting critical, the new circuit has a fast operation speed under 1.2V supply voltage with compared to the complementary pass transistor logic(CPL), which is know to have the most potential in low-voltage low-power digital circuit design. The operational principles and fan-in characteristics are given and complex logic implementation capability and low-voltage driving ability are all given in this thesis. To be an example, the logic synthesis of the pass-transistor logic is also given in this thesis. To verify the circuit performance, an experimental chip fabricated by CIC, NSC in 0.8um SPDM CMOS process has been measured and the resulrs verifying the simulation results.