標題: CMAC類神經網路之ASIC研製及其在控制上的應用
The ASIC Design Of The CMAC Neural Network And Its Application In Control
作者: 陳建斌
Chen, Chang-Been
陳福川
Chen, Fu-Chuang
電控工程研究所
關鍵字: CMAC類神經網路;連結量;weight
公開日期: 1994
摘要: 本論文之主要目的在建立一套獨立於PC之外的CMAC控制系統,此系統平行地結合傳統的PD控制器與CMAC類神經網路控制器,用以改善傳統的PD控制器於非線性系統的控制精度。 由於VLSI技術的進步,我們藉由硬體上的設計來提高CMAC類神經網路的運算能力,並使得PD控制器與CMAC類神經網路控制器能平行地進行計算。首先,我們必須先修改CMAC類神經網路中的計算形式,並訂定其規格,以降低CMAC類神經網路於電路設計時的難度。接著,我們以兩顆Xilin公司的FPGA晶片及兩顆32k×8的SRAM來實現CMAC類神經網路控制器,FPGA晶片負責CMAC類神經網路的計算,而SRAM則儲存神經元間的連結量(weight)。其次,我們以8051 單晶片實現PD控制器,且平行地結合以FPGA晶懲實現的CMAC控制器,再輔以HP公司的HCTL-2016回授馬達的位置至8051單晶片,AD7541A將數位的控制輸出訊號轉換成類比的電壓訊號,架構成完整的CMAC控制系統。最後,將CMAC控制系統應用於A 型臂上第五軸馬達的控制,以驗證我們所設計的CMAC控制系統。
The object of this paper is to build a stand-alone CMAC control system which combine parallelly the tranditional PD controller and the CMAC controller. We use the control system to improve existing nonlinear control systems. Because of the great progress in VLSI technology, we can raise the computation speed of the CMAC neural network if it is implemented as a chip. The CMAC chip will function parallelly with the PD controller which is implemented via 8051. First, we modify some computation and determine the specifications and parameters in order to reduce the complexity of hardware design in the CMAC neural network. Then we implement CMAC by two Xilinx's FPGA chips and two 32k×8 SRAMs. The FPGA chips implement the computation n the CMAC neural network. The SRAMs store the weights of the CMAC neural network. Secondly, we implement the PD controller in 8051 single chip which reads the motor position feedback from HCTL-2016. Then, we integrate the PD controller, the CMAC, the HCTL-2016 and the AD7541A to implement the overall CMAC control system. Finally we apply the CMAC control system to conrol the fifth motor of the A-type robot to verify our hardware design.
URI: http://140.113.39.130/cdrfb3/record/nctu/#NT833327014
http://hdl.handle.net/11536/59858
顯示於類別:畢業論文