標題: | Evaluation of RF and logic performance for 80 nm InAs/InGaAs composite channel HEMTs using gate sinking technology |
作者: | Kuo, Chien-I Hsu, Heng-Tung Chang, Chia-Yuan Chang, Edward Yi Hsu, Heng-Shou 材料科學與工程學系 Department of Materials Science and Engineering |
公開日期: | 2007 |
摘要: | 80-nm-gate In(0.7)Ga(0.3)As/InAs/In(0.7)Ga(0.3)As composite channel high-electron mobility transistors (HEMTs) fabricated using platinum (Pt) buried gate as the Schottky contact metal were evaluated for RF and logic application. After gate sinking at the 250 degrees C for 3 minutes, the device exhibited a high g. value of 1590mS/mm at V(d) = 0.5V and the current gain cutoff frequency f(T) was measured to be 494 GHz. The intrinsic gate delay time was calculated to be 0.78 psee at supply voltage of 0.6 V. This is the highest f(T) achieved for 80 nm gate length HEMT devices. These superior performances are attributed to the reduction of distance between. gate and channel, and the reduction of parasitic gate capacitances during gate-sinking process. |
URI: | http://hdl.handle.net/11536/6001 |
ISBN: | 978-1-4244-0636-4 |
期刊: | EDSSC: 2007 IEEE INTERNATIONAL CONFERENCE ON ELECTRON DEVICES AND SOLID-STATE CIRCUITS, VOLS 1 AND 2, PROCEEDINGS |
起始頁: | 255 |
結束頁: | 258 |
顯示於類別: | 會議論文 |