標題: | RF and logic performance improvement of In0.7Ga0.3As/InAs/In0.7Ga0.3As composite-channel HEMT using gate-sinking technology |
作者: | Kuo, Chien-I Hsu, Heng-Tung Chang, Edward Yi Chang, Chia-Yuan Miyamoto, Yasuyuki Datta, Suman Radosavljevic, Marko Huang, Guo-Wei Lee, Ching-Ting 材料科學與工程學系 Department of Materials Science and Engineering |
關鍵字: | High-electron mobility transistors (HEMTs);InAs;InGaAs;platinum (Pt) buried gate |
公開日期: | 1-四月-2008 |
摘要: | Eighty-nanometer-gate In0.7Ga0.3As/InAs/ In0.7Ga0.3As composite-channel high-electron mobility transistors (HEMTs), which are fabricated using platinum buried gate as the Schottky contact metal, were evaluated for RF and logic application. After gate sinking at 250 degrees C for 3 min, the device exhibited a high g(m) value of 1590 mS/mm at V-d = 0.5 V, the current-gain cutoff frequency f(T) was increased from 390 to 494 GHz, and the gate-delay time was decreased from 0.83 to 0.78 ps at supply voltage of 0.6 V. This is the highest f(T) achieved for 80-nm-gate-length HEMT devices. These superior performances are attributed to the reduction of distance between gate and channel and the reduction of parasitic gate capacitances during the gate-sinking process. Moreover, such superior performances were achieved through a very simple and straightforward fabrication process with optimal epistructure of the device. |
URI: | http://dx.doi.org/10.1109/LED.2008.917933 http://hdl.handle.net/11536/9505 |
ISSN: | 0741-3106 |
DOI: | 10.1109/LED.2008.917933 |
期刊: | IEEE ELECTRON DEVICE LETTERS |
Volume: | 29 |
Issue: | 4 |
起始頁: | 290 |
結束頁: | 293 |
顯示於類別: | 期刊論文 |