标题: | 以FPGA设计具平行运算能力的CMAC控制器 The Design of Parallel CMAC Neural Network Controller via FPGA chips |
作者: | 吴秀芳 Wu, Shiow-Fang 陈福川 Fu-Chuang Chen 电控工程研究所 |
关键字: | 小脑模组关节控制器;CMAC |
公开日期: | 1995 |
摘要: | 本论文的目的,在于以FPGA设计具平行运算能力的CMAC控制器,并将此 CMAC类神经网路控制器与PD控制器结合,形成CMAC控制系统,用以改善传 统PD控制器于非线性系统的控制精度。 在本论文中我们利用SIMD计算架 构及FPGA电路设计来解决CMAC类神经网路记忆体并取的瓶颈,让CMAC控制 器有能力一次从记忆体中读取或写入两笔资料。首先,我们将D.Ellison 所提出的产生演算法转成实际电路,并订定其规格,以做为电路设计的依 据。接着,我们以3颗Xilinx公司的FPGA晶片及6颗32K×8的静态记忆体来 实现具平行运算能力的CMAC类神经网路控制器,其中FPGA负责CMAC类神经 网路的计算架构,而静态记忆体则负责储存神经元连结量(weight)。其次 ,我们以8051单晶片实现PD控制器,再辅以数位/类比转换器(AD7541A)将 数位输出讯号转成类比电压讯号,及16位元的解码/计数器(HCTL-2016)将 马达位置回授至8051单晶片,架构成完整的CMAC控制系统。最后,将CMAC 控制系统应用于直流马达,以验证我们所设计的CMAC控制系统。 The object of this thesis is to build the CMAC controller with parallel computing capability via FPGA chip. This CMAC control system combines parallelly the tranditional PD controller and the CMAC contoller. We use the CMAC controller to improve existing nonlinear control systems. In this paper, we use SIMD computation architecture and the FPGA chips to solve the problem in the simultaneous fetch and store of the data.The CMAC controller designed has the ability to fetch or store two data simultaneously. First, we transform the generalition algorithm proposed by D.Ellision into physical circuits. We also determine the specifications and parameters the circuits. Then we implement CMAC by three FPGA chips and six 32k×8 SRAMs. The FPGA chips are for the computation of the CMAC neural network. The SRAMs store the weights of the CMAC neural network. Secondly, we implement the PD controller by 8051 single-chip computer. Then, we integrate the PD controller,the CMAC controller,the HCTL-2016 and the AD7541A to construct the overall CMAC control system. Finally, we apply the CMAC control system to control the DC servomotor to verify our hardware and software design . |
URI: | http://140.113.39.130/cdrfb3/record/nctu/#NT840327020 http://hdl.handle.net/11536/60275 |
显示于类别: | Thesis |