多處理機模擬系統平行化之研究

Abstract

研 究 生：朱遂昕 指導教授：鍾崇斌 教授 國立交通大學資訊工程研究所 摘要 基於大量運算能力之迫切需求，多處理機系統已成為高速計算機系統之設 計趨勢。對一個多 處理機系統發展過程而言，為檢驗設計及評估效能 ，必須於實際製作生產之前建立適當的模 擬發展環境。藉由此環境， 來模擬及驗證完整系統的行為，更改系統的設計，進而加速系統 發展 的週期。目前的模擬系統大多是在單一處理機系統中執行，然而限於單一 處理機系統的 記憶體容量及執行速度，此種模擬環境所能模擬的系統 大小及複雜度相當有限。為解決這些 限制，必須借助平行模擬環境的 發展。本計畫是以 PROTEUS Parallel-Architecture Simulation 系統為藍本，來發展一個多處理機的平行模擬發展環境。利 用兩台工作站，同 時分別執行模擬程式的不同部分，以達到平行化的 效果。而兩台工作站之間的訊息傳遞，則 利用網路來溝通。研究結果 發現，就 CPU time 而言，平行化後確實有相當的速度增益，且 模擬 的系統愈大（即 CPU 數目增加），速度增益愈好。這是因為CPU 增加將 使 active thread 的數目亦增加，而使得平行度變大。但就模擬系統的 實際執行時間而言，平行化後卻比原 來循序執行來得慢。此乃因網 路傳遞訊息的時間比資料計算時間大很多，因此平行化後， CPU 實際運作只佔所有執行時間的一小部份，其餘都是訊息傳遞的時間。所以 在網路還相 當慢的情況下，要改模擬系統的執行速度， 還是要以多 處理機系統作為平行化的實現環境。 Student : Shei-Sin Ju Advisor : Prof. Chung-Pin Chung Institute of Computer Science and Information Engineering National Chiao Tung University ABSTRACT Because of the necessity of massively parallel processing, multiprocessor systems have become the trend of high performance computer architecture design. In developing a multiprocessor system, one usually should establish a proper simulation environment to examine the design tradeoffs and evaluate the performance before the real product is constructed. Through simulation, we can monitor and debug the system behavior to verify the system design and accelerate the design of the system. Nowadays, most of the existing simulators are run on a single PE computer system. Due to the limitation of memory capacity and execution speed of the simulation machine, the complexity of target machine that can be simulated is severely constrained. To release this constraint, it is vital to develop a parallel simulation environment. Therefore, we propose this project to design a parallel development environment on the bases of PROTEUS Parallel- Architecture Simulation. We separate the original PROTEUS to two modules (PE and Memory) and dispatch them to two workstations. Messages between the two modules are transmitted through network. We find that if network delay is ignored, some speedup can be gained. When the simulated target machine size is larger (i.e., number of simulated processors are increased), the speedup is more evident. The reason is that when the number of simulated processors is increased, the number of active threads is also increased, giving a bigger degree of parallelism. On the other hand, the actual execution time (including network delay) of parallel PROTEUS is longer than the original version. This is because the message transmission time is larger than the computation time. Therefore, after the PROTEUS is parallelized, the CPU time is only a little portion of the whole elapsed time, and the dominant portion of delay is due to the message transmission time. So, if we want to improve the real execution time in parallel simulation, a Multiprocessor system must be used.