選擇性LPD之成長機制及其研究應用

Abstract

液相沉積 (LPD) 係一種低溫製程技術。液相沉積二氧化矽可在室溫 環境下成長 (35 ℃ ) 且對光阻具有選擇性。 我們對此一獨特在光阻上 具有選擇性的特性加以研究和開 發應用。 我們發現了此一沉積技術在 不同的 Si(OH)4 濃度和成長溫度下會有三種不同 的沉積結果：在光阻 與矽基板上全面性地覆蓋矽氧化膜，選擇性地只在矽基板上沉積， 以及 兩者上都不沉積的情形。 我們亦以 Si(OH)4 和成長溫度建立了選擇性沉 積的範圍 也提出了選擇性成長的機制。 三種成長結果係基於不同的 Si(OH)4 過飽和濃度和成長 溫度。不同的 Si(OH)4 過飽和濃度可借由 添加不同量的硼酸來達成。 我們應用此一技術來達成半導體元件上之接觸孔的製作。 我們首先針對 接觸孔模組 來研究。 關於此一模組，我們選擇了一般的 p+-n 接面和 Al/n-Si 蕭特基二極體來討 論。我們亦利用傳統活性離子蝕刻技術製做 了對照的樣品。在傳統利用活性離子蝕刻技 術製做接觸孔中，首先成長 一層絕緣層，然後利用微影技術定義出接觸孔。接下來使用 活性離子蝕 刻技術開出接觸孔來。然在我們提出的接觸孔技術中，所採用的製程順序 剛 好相反。首先我們在尚未沉積一絕緣層前，先採用微影技術定義出接 觸孔。在至此一製 程中，我們除去了接觸孔外的光阻，接觸孔上的光阻 加以保留。此一方式恰與傳統製程 中相反。然後利用選擇性液相沉積技 術在光阻以外的地方選擇性地沉積一層絕緣層。最 後將光阻去除，接觸 孔便自動形成。我們發現利用選擇性沉積技術所製做的接面和蕭特 基二 極體比起由傳統活性離子蝕刻技術所製做的具有較優越的特性。我們認為 此一結果 係因為選擇性沉積技術可以不須經由蝕刻而自動形成接觸孔， 所以免去了一些可能由活 性離子蝕刻技術對元件造成的傷害和污染。 最後， 除了接觸孔模組上的研究外，我們亦利用此一技術製做了一完整 的元件：低 溫薄膜電晶體。以液相沉積二氧化矽做為閘極氧化層和選擇 性液相沉積二氧化矽自動形 成接觸孔的批覆層完成了低溫的薄膜電晶體 。此一低溫薄膜電晶體俱有良好的特性和較 高的信賴性。 Liquid Phase Deposition (LPD) is a low temperature technique. A LPD oxide can be prepared at room temperature (35 ℃ ). A unique property of selectivity deposition against photoresist has been found and developed. In this thesis, we investigate on the mechanism of selective deposition and develop its application. We have find out that there are three types of depositing LPD oxide: (1) no deposition, (2) blanket deposition, and (3) selective deposition. The process windows of selectivity with respect to the Si(OH)4 concentration and the deposition temperature have been constructed and a mechanism to explain the deposition mechanism has also been proposed. The mechanism of three deposition types is relied on the supersaturated degree of the immersing solution. A selective deposition can be obtained in a certain concentration of Si(OH)4. The concentration of Si(OH)4 can be controlled by the concentration of the added H3BO3 and the deposition temperature. The employment of selective LPD oxide grown at room temperature provides an alternative to conventional high temperature processes for certain application. We apply this technique to automatically form the contact holes in semiconductor devices. At first, we investigate the contact hole module by a p+-n junction and a Al/n-Si Schottky diode. Samples with contact hole fabricated by the conventional RIE process are also prepared for comparison. Conventionally, one is used to deposit the dielectric film followed by defining the pattern of contact holes via lithography, then RIE technique is used to open the contact holes with the photoresist as a mask. In contrast to the conventional fabrication flow for contact hole, we used an inverted process flow. We apply the lithography technique to define the pattern of contact holes prior to deposit a dielectric film. The photoresist is conserved on areas of the surface intended to form thereon a contact hole. Then selective LPD is employed to deposit an insulation layer on the surface not covered by the photoresist. Finally, photoresist is stripped and contact holes are automatically formed. We have found that both the performances of p+-n and Al/n-Si Schottky diodes with contact holes formed by the selective LPD method are much better than those fabricated by the RIE method. This is because that the selective LPD is capable of forming contact holes devoid of contamination and damage with compared to those fabricated by the conventional RIE process. In addition to the development of the selective LPD application in the contact hole modules, we have also successfully applied the selective LPD technique to an integral device, LTP TFT. A poly-Si TFTs was fabricated with LPD oxide as a gate insulator and selective LPD-SiO2-xFx as the capping layer in which the contact holes were automatically formed during the dielectric deposition . We find that the characteristics of TFT fabricated by the selective LPD are comparable with those fabricated by the RIE. Furthermore, the TFTs fabricated by selective LPD showed a better reliability than that by RIE.