次微米MOS元件中熱電子導致氧化層傷害及元件特性退化分析

Abstract

本論文提出新的萃取方法和線性汲極電流退化解析模式，用 來探討 LDD N 型結構金氧半元件中熱電子效應所引起的氧化層傷 害(包含界面狀態與固定捕捉電荷)及元件特性退化。利用電荷幫 浦法結合氧化層傷害與加壓時間的冪法則發展出擷取此傷害空間 及時間分佈新技術。這些新方法相較於傳統方式，不僅可避免重 覆量測電荷幫浦電流時對元件所產生傷害並能很容易與現有之二 維元件模擬器相搭配。本研究亦對不同氧化層厚度之元件作一番 探討，其結果顯示在相同操作偏壓下，氧化層較薄的元件卻有較 大的特性退化。吾等利用上述擷取氧化層傷害分佈方法並考慮新 的退化機制，包含串聯電阻增加與通道長度調變，發展出一套適 用於 LDD 及傳統型元件模擬的通用型解析線性汲極電流退化模式 。此一模式可以定性地瞭解元件隨氧化層厚度不同而產生的退化 特性差異，並可定量地準確預測汲極電流退化。此項研究成果幫 助吾人對熱電子效應退化機制的了解並可提供元件可靠性及最佳 化設計的準則。 This dissertation presents newly-developed profiling methods and an analytical linear drain current degradation model to analyze hot-electron-induced oxide damages (inter- face trap generation and fixed oxide charge trapping) and the associated device degradation mechanisms in LDD n-MOSFET's. Several time-evolutional oxide damage profiling techniques based on charge pumping measurements in combi- nation with power-law dependence of such damages on stress time were developed. These methodologies can be easily pro- grammed into existing simulation frameworks, while with less experimental efforts as compared to the previously proposed ones. In addition, hot carrier stress was performed on devices with various gate oxide thicknesses. It is seen that the thinner the gate oxide thickness, the larger the device degradation. Thus, a generalized model of linear drain-current degradation by incorporating the gate-electric -field, namely, series resistance increase and channel length modulation, is developed. This model is well-suited for both conventional and LDD MOS devices. By using this developed model, the current degradation can be predicted with excellent accuracy both quantitatively and quali- tatively in comparison with experimental data for a wide range of gate-bias and oxide-thickness conditions. These achievements can provide us useful information for degra- dation mechanisms and design guideline of device optimi- zation.