標題: | 非同步傳輸模式網路中之使用參數控制晶片的設計與製作 Design and Implementation of Usage Parameter Control in ATM Networks |
作者: | 葉錦龍 Yeh, Ching-Lung 李程輝 Lee Tsern-Huei 電信工程研究所 |
關鍵字: | 非同步傳輸模式;使用參數控制;Asynchronous Transfer Mode(ATM);Usage Parameter Control(UPC) |
公開日期: | 1995 |
摘要: | 使用參數控制是指網路為監控終端系統的訊務(traffic)所做的動作,這訊 務包括了訊務量的大小以及非同步傳輸模式連結(ATM connection)的合法 性。藉著已協定好的參數運算及採取適當的動作,進而達到保護網路資源 的目的,避免因無意或蓄意的行為而影響其他已建立連結的服務品質。本 論文即針對具有開關來源(on-off source)特性的封包源(cell source), 製作架構於UTOPIA介面的使用參數控制晶片,適用的封包型式可為語音封 包、靜止影像封包、高畫質電視封包。我們採用Xilinx公司所生產的 FPGA(Field Programmable GateArray)來設計開發晶片,並藉由時序模擬( timing simulation)來驗證所設計電路的正確性。 Usage Parameter Control (UPC) is defined as the set of actions taken by the networkto monitor and control traffic, in terms of traffic offered and validity of the ATM connection, at the end- system access. Its main purposeis to protectnetwork resources from malicious as well as unintentional misbehavior, which canaffect the QoS of other already established connections, by detecting violationsof negotiated parameters and taking appropriate actions. In this thesis wepresent a design and implementation of dual leaky bucket UPC scheme. The sourcesare assumed to be on-off sources. Three possible services, i.e., voice, stillpicture, and high-definition TV (HDTV), are considered in our design. We useXilinx's FPGA (Field ProgrammableGate Array) chips to design and implement circuits. The designed circuits are verified by timing simulations to be correct. |
URI: | http://140.113.39.130/cdrfb3/record/nctu/#NT840435021 http://hdl.handle.net/11536/60772 |
顯示於類別: | 畢業論文 |