標題: | 閘極氧化層可靠性之分析與應用於表面通道P型金氧半場效電晶體之閘極工程 Analysis of Gate Oxide Reliability and Gate Engineering Applied in Surface-Channel PMOSFETs |
作者: | 林永豪 Lin, Yung-Hao 李崇仁 雷添福 Lee, Chung-Len Lei, Tan-Fu 電子研究所 |
關鍵字: | 閘極氧化層;表面通道 |
公開日期: | 1995 |
摘要: | 在此論文中,首先我們提出兩種新的技術在P型金氧半場效電晶體(pMOSFET)中抑制硼離子的穿透,並改善閘極氧化層的電性。其一為利用氧化物攫取氟元素的功效,以降低氟元素於閘校氧化層中的含量。首先,在佈植氟化硼之前,成長一薄氧化層(大約100°A)於複晶矽閘極之上。而於離子佈植後的退火過程中,該薄氧化層可由複晶矽與閘極氧化層中將氟元素攫取出來,進而抑制了氟元素促使硼離子穿透的效應。另外,吾人亦研究複晶矽閘極的高溫退火過程對N型與P型金氧半電容的影響。此退火過程增大了複晶矽晶粒,並因此抑制了P型金氧半電容中硼離子穿透的效應。同時,對於P型金氧半電容,存在一最佳化的退火溫度以得到最大的崩潰電荷量。
另一方面,對於利用氧化物攫取氟元素的功效,亦可將一超薄氧化層(大約20°A)介於疊型複晶矽閘極中(POP)。於離子佈植後的退火過程中,對於以氟化硼佈植的複晶矽閘校,同樣地,該超薄氧化層攫取其中的氟元素,而減小了閘極氧化層中氟元素的量與氟元素促使硼離子穿透的效應。當該攫取氟元素的薄氧化層厚度增大或位置較遠離閘極氧化層,其阻止硼離子穿透的效果亦更好。而且該新閘極結構(POP)與傳統單層或疊型複晶矽閘極比較,亦大幅改善了電性,尤其當該介於閘極層間的薄氧化層靠近閘極氧化層時。吾人相信其導源於在複晶矽閘極和閘極氧化層間應力的減輕。
而另一種效抑制硼離子穿透的技術為對複晶矽閘極作氮化處理,而非傳統的氮化閘極氧化層。在疊型複晶矽閘極間以氨氣(NH3)作氮化處理,產生一薄氮化層。由於該氮化層阻擋了氟元素在複晶矽閘極中的擴散,以致在閘極氧化層中,氟元素的量與氟元素促使硼離子穿透的效應均相對地減小。而且,此新技術避免了以往對閘極氧化層作氨氣(NH3)氮化處理所產生的不良效應。相反地,由於對閘極氧化層間接且輕微的氮化效果,該經氮化的疊型複晶矽閘極大幅改善了閘極氧化層的電性。
除上敘之閘極工程,我們亦提出一新的量測方法,以評估閘極氧化層之可靠性。在高電場固定電流壓迫時,正電荷和負電荷向來同時於氧化層中產行。此方法即利用一反向偏壓將正電荷完全中和,而只留下負電荷於氧化層中。再由正負電荷所個別引起的電容和電流曲線之平移,求得被捕抓於氧化層中之正負電荷的個別分佈情形。其後我們利用此方法研究電荷捕抓(charge trap)情形與壓迫電流、注入電荷量和製程因素間之相依關係。另外亦探討正電荷的可逆性質,即其穩定狀態的數量乃由最終的氧化層電場所決定。
最後,我們研究在不同壓迫條件下,閘極氧化層漏電流之產生情形,並驗證其與正電荷相關之機制。我們發現壓迫極性,亦即正電荷之位置,對漏電流之產生有很大的影響。而當利用-反向偏壓將正電荷完全中和,漏電流亦隨之回復。並且當動態地改變正電荷於氧化層中之分佈情形,漏電流亦隨之變動。 In this thesis, we first propose two new techniques to suppress the boron penetration and improve the electrical characteristics of the gate oxide in pMOSFET. One is by applying the oxide gettering fluorine effect to reduce the amount of fluorine in the gate oxide. First, before the BF2+_implantation, a thin polyoxide (∼100°A)was grown on the top of a poly-Si gate. Then, during the post-implant annealing, this thin top oxide would getter fluorine out from the poly-Si film as well as from the gate oxide.Thus, the fluorine-enhancement on the boron penetration in the gate oxide was suppressed. Moreover, the effects of high temperature annealing to poly-Si gates on the characteristics of both n- and p-MOS were also investigated, Post-poly-annealing (PPA) enlarged the grain size of poly-Si films and thus suppressed the boron penetration in pMOS. And there was an optimized temperature of PPA to result in the largest breakdown charges for pMOS. On the other hand, this oxide gettering fluorine effect could also be applied by inserting an ultra-thin oxide in-between the stacked poly-Si gate (POP). Similarly, during the post-implant-annealing, this ultra-thin oxide gettered the fluorine in the BF2+_ Finally, under defferent stressing conditions, we studied the induction of gate oxide leakage currents and testified their positive charge inducing mechanism. The leakage currents have strong dependence on the stressing polarity, that is, the centroid of the positive trapped charges, And when these positive charges are neutralized by a low reverse bias stress, the leakage currents are also recovered. Moreover, when dynamically changing the distrbutions of these positive charges in the oxide film, the leakage currents were found to transform accordingly. |
URI: | http://140.113.39.130/cdrfb3/record/nctu/#NT843428002 http://hdl.handle.net/11536/61094 |
Appears in Collections: | Thesis |