| 標題: | 背閘偏壓控制對低電壓、低功耗互補式金氧半類比數位積體電路之衝擊 = The impact of back-gate bias control on low voltage, low power CMOS analog/digital integrated circuits |
| 作者: | 何繼勛 陳明哲 電子研究所 |
| 公開日期: | 1995 |
| URI: | http://140.113.39.130/cdrfb3/record/nctu/#NT846430009 http://hdl.handle.net/11536/61361 |
| Appears in Collections: | Thesis |
- Back-gate forward bias method for low-voltage CMOS digital circuits / Chen, MJ;Ho, JS;Huang, TH;Yang, CH;Jou, YN
- New gate-bias voltage-generating technique with threshold-voltage compensation for on-glass analog circuits in LTPS process / Chen, Jung-Sheng;Ker, Ming-Dou
- 低功率低電壓數位及類比積體電路之晶片實現及設計法則(IV) / 陳明哲;CHEN MING-JER
- 低電壓互補式金氧半製程下的類比電路設計與可靠度 / 陳榮昇;Jung-Sheng Chen;柯明道;Ming-Dou Ker
- 低電壓互補式金氧半製程下的高電壓電路設計 / 陳世倫;Shih-Lun Chen;柯明道;Ming-Dou Ker
- A gate-coupled PTLSCR/NTLSCR ESD protection circuit for deep-submicron low-voltage CMOS IC's / Ker, MD;Chang, HH;Wu, CY
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