標題: A Low Operating Voltage ZnO Thin Film Transistor Using a High-kappa HfLaO Gate Dielectric
作者: Su, N. C.
Wang, S. J.
Chin, Albert
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
公開日期: 2010
摘要: This study demonstrates the feasibility of producing a ZnO thin film transistor (TFT) using hafnium-lanthanum-oxide (HfLaO) as the gate dielectric. By integrating high-kappa HfLaO with an amorphous ZnO channel, the resulting HfLaO/ZnO TFTs display a low threshold voltage (V(T)) of 0.28 V, a small subthreshold swing (SS) of 0.26 V/dec, an acceptable mobility (mu(sat)) of 3.5 cm(2)/V s, and a good I(on)/I(off) ratio of 1 X 10(6). The SS heavily depends on the HfLaO/ZnO interface charges, a property which is related to the degree of crystallization of ZnO. The low VT and the small SS allow device voltage operation below 2 V for low power application. (C) 2009 The Electrochemical Society. [DOI: 10.1149/1.3257607] All rights reserved.
URI: http://hdl.handle.net/11536/6216
http://dx.doi.org/10.1149/1.3257607
ISSN: 1099-0062
DOI: 10.1149/1.3257607
期刊: ELECTROCHEMICAL AND SOLID STATE LETTERS
Volume: 13
Issue: 1
起始頁: II8
結束頁: II11
顯示於類別:期刊論文


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